IP Library Granted Patent US 8,222,706
Granted Patent B2
US 8,222,706 · App. 12/878,364 · Granted Jul 17, 2012

Semiconductor device

Assignee: Fujitsu Semiconductor Limited
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Quick Facts
Patent No.
US 8,222,706
App. No.
12/878,364
Granted
Jul 17, 2012
Kind
B2
Abstract

A semiconductor device includes, a gate insulating film, a gate electrode, a source/drain region, and a Si mixed crystal layer in the source/drain region. The Si mixed crystal layer includes a first Si mixed crystal layer that includes impurities with a first concentration, a second Si mixed crystal layer formed over the first Si mixed crystal layer and that includes the impurities with a second concentration higher than the first concentration, and a third Si mixed crystal layer formed over the second Si mixed crystal layer and that includes the impurities with a third concentration lower than the second concentration.

Claims (17)

1. A semiconductor device comprising:

a silicon substrate;

a first conductive type channel region formed in the silicon substrate;

a gate insulating film formed over the channel region;

a gate electrode formed over the gate insulating film;

a first diffusion region that includes a first impurity with a second conductive type and that is formed over the silicon substrate at both sides of the channel region; and

a Si mixed crystal layer with the second conductive type that is in contact with the first diffusion region and buried in a trench portion that is formed in the silicon substrate;

wherein, the Si mixed crystal layer includes:

a first Si mixed crystal layer that includes a second impurity with a first concentration;

a second Si mixed crystal layer formed over the first Si mixed crystal layer and that includes the second impurity with a second concentration higher than the first concentration; and

a third Si mixed crystal layer formed over the second Si mixed crystal layer and that includes the second impurity with a third concentration lower than the second concentration.

2. The semiconductor device according to claim 1 ; further comprising:

a second diffusion region with the second conductive type formed between the silicon substrate and the first Si mixed crystal layer.

3. The semiconductor device according to claim 1 ; further comprising:

a silicide layer formed over the third Si mixed crystal layer.

4. The semiconductor device according to claim 1 , wherein the first conductive type is an n-type, the second conductive type is a p-type, and the Si mixed crystal layer is a p-type SiGe layer.

5. The semiconductor device according to claim 1 , wherein the first conductive type is a p-type, the second conductive type is an n-type, and the Si mixed crystal layer is one of an n-type SiC layer and an n-type SiGeC layer.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2025
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 073964/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 27, 2024
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 069454/0333 →
MERGER Recorded May 24, 2023
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU LIMITED
Reel/Frame 064221/0545 →
CHANGE OF NAME AND CHANGE OF ADDRESS Recorded Jul 16, 2020
From: AIZU FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 053481/0962 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2020
From: FUJITSU SEMICONDUCTOR LIMITED
To: AIZU FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 053209/0468 →
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 13, 2010
From: NISHIKAWA, MASATOSHI
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024974/0673 →
Priority Claims (1)
JP 2009-209738 · Sep 10, 2009 · national
Continuity (1)
Related Publication 20110057270A1 · Mar 10, 2011