IP Library Granted Patent US 8,435,861
Granted Patent B2
US 8,435,861 · App. 12/957,627 · Granted May 7, 2013

Method of manufacturing a semiconductor device having different kinds of insulating films with different thicknesses

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Quick Facts
Patent No.
US 8,435,861
App. No.
12/957,627
Granted
May 7, 2013
Kind
B2
Abstract

A method of manufacturing a semiconductor device includes oxidizing a surface of a semiconductor substrate to form a first insulating film covering a first area, a second area, and a third area of the semiconductor substrate; removing the portions of the first insulating film lying on the first area and the second area; oxidizing the surface of the semiconductor substrate to form a second insulating film covering the first area and the second area and further oxidizing the third area covered with the first insulating film; and removing the portion of the second insulating film lying on from the second area and the portion of the first insulating film lying on the third area.

Claims (33)

1. A method of manufacturing a semiconductor device comprising:

forming isolation regions in a semiconductor substrate to form a first area, a second area and third area which are different from each other;

oxidizing a surface of the semiconductor substrate to form a first insulating film covering the first area, the second area, and the third area of the semiconductor substrate;

removing portions of the first insulating film lying on the first area and the second area;

oxidizing the surface of the semiconductor substrate to form a second insulating film covering the first area and the second area;

oxidizing the third area covered with the first insulating film;

removing a portion of the second insulating film lying on the second area and the portion of the first insulating film lying on the third area;

oxidizing the surface of the semiconductor substrate to form a first gate insulating film covering the second area and the third area; and

oxidizing the first area covered with the second insulating film to form a second gate insulating film, the second gate insulating film covering the first area is thicker than the first gate insulating film.

2. The method of manufacturing a semiconductor device according to claim 1 , further comprising:

doping the second area with a first dopant having a first conductivity type and doping the third area with a second dopant having a second conductivity type.

3. The method of manufacturing a semiconductor device according to claim 1 , further comprising:

forming a conductive film covering the first gate insulating film and the second gate insulating film and patterning the conductive film to form a first gate electrode on a portion of the first gate insulating film lying on the second area, a second gate electrode on a portion of the first gate insulating film lying on the third area, and a third gate electrode on a portion of the second gate insulating film lying on the first area.

4. The method of manufacturing a semiconductor device according to claim 1 , wherein: the first insulating film is formed to additionally cover a fourth area of the semiconductor substrate;

oxidizing the fourth area covered with the first insulating film; and

oxidizing the fourth area covered with the first insulating film to be covered with a third gate insulating film, the third gate insulating film is thicker than the second gate insulating film.

5. The method of manufacturing a semiconductor device according to claim 1 , wherein the second area corresponds to a N-type low-voltage transistor formation area and the third area corresponds to a P-type low-voltage transistor formation area.

6. The method of manufacturing a semiconductor device according to claim 1 , wherein the first area corresponds to a medium-voltage transistor formation area.

7. The method of manufacturing a semiconductor device according to claim 2 , wherein: the amount of the first dopant is equal to or greater than 1×10 13 cm −2.

8. The method of manufacturing a semiconductor device according to claim 2 , wherein: the first dopant is a P-type dopant; and the second dopant is an N-type dopant.

9. The method of manufacturing a semiconductor device according to claim 2 , further comprising:

covering the semiconductor substrate with an element-partitioning film that defines the first area, the second area, and the third area.

10. A method of manufacturing a semiconductor device comprising:

oxidizing a surface of a semiconductor substrate to form a first insulating film covering a first area, a second area, and a third area of the semiconductor substrate;

removing portions of the first insulating film lying on the first area and the second area;

oxidizing the surface of the semiconductor substrate to form a second insulating film covering the first area and the second area;

oxidizing the third area covered with the first insulating film;

removing a portion of the second insulating film lying on the second area and the portion of the first insulating film lying on the third area;

oxidizing the surface of the semiconductor substrate to form a first gate insulating film covering the second area and the third area; and

oxidizing the first area covered with the second insulating film to form a second gate insulating film, the second gate insulating film covering the first area is thicker than the first gate insulating film,

wherein: the first insulating film is formed to additionally cover a fourth area of the semiconductor substrate;

oxidizing the fourth area covered with the first insulating film; and

oxidizing the fourth area covered with the first insulating film to be covered with a third gate insulating film, the third gate insulating film is thicker than the second gate insulating film.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2025
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 073964/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 27, 2024
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 069454/0333 →
MERGER Recorded May 24, 2023
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU LIMITED
Reel/Frame 064221/0545 →
CHANGE OF NAME AND CHANGE OF ADDRESS Recorded Jul 16, 2020
From: AIZU FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 053481/0962 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2020
From: FUJITSU SEMICONDUCTOR LIMITED
To: AIZU FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 053209/0468 →
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 29, 2011
From: ARIYOSHI, JUNICHI; YOSHIZAWA, KAZUTAKA
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 025718/0080 →