Error-floor mitigation of codes using write verification
View Patent ↗Executed when a channel input (e.g., LDPC) codeword is written to a storage medium, a write-verification method (i) compares the channel input codeword to the written codeword, (ii) identifies any erroneous bits, and (iii) stores the erroneous-bit indices to a record in a table. At some later time, the written codeword is read and sent to a decoder. If the decoder fails with a near codeword, a write-error recovery process searches the table and retrieves the erroneous-bit information. The codeword bits at those indices are adjusted, and the modified codeword is submitted to further processing.
1. A machine-implemented method for storing an original encoded codeword to a storage medium, the method comprising:
(a) writing the original encoded codeword to the storage medium as a written encoded codeword;
(b) generating a channel output codeword by reading the written encoded codeword from the storage medium;
(c) comparing the original encoded codeword to a derived codeword based on the channel output codeword to identify a first set of one or more erroneous bits in the written encoded codeword;
(d) generating a second set of one or more erroneous bits in the written encoded codeword by selecting one or more erroneous bits in the first set; and
(e) writing, to the storage medium, erroneous-bit information corresponding to the one or more erroneous bits in the second set.
2. The invention of claim 1 , wherein the original encoded codeword is a low-density parity-check codeword.
3. The invention of claim 1 , wherein step (c) further comprises performing decoding on the channel output codeword to generate the derived codeword.
4. The invention of claim 1 , wherein the second set is equal to the first set.
5. The invention of claim 1 , wherein the second set is a proper subset of the first set.
6. The invention of claim 1 , further comprising:
(f) generating a decoder input codeword by reading the written encoded codeword from the storage medium;
(g) performing decoding on the decoder input codeword to generate a decoded codeword; and
(h) if the decoded codeword is not a decoded correct codeword, then:
(h1) reading the erroneous-bit information from the storage medium;
(h2) generating a modified codeword based on the erroneous-bit information; and
(h3) performing further processing on the modified codeword.
7. The invention of claim 6 , wherein step (h2) comprises modifying one or more bits in the decoded codeword based on the erroneous-bit information to generate the modified codeword.
8. The invention of claim 6 , wherein step (h3) comprises:
(h3i) determining whether or not the erroneous-bit information corresponds to all of the erroneous bits in the first set;
(h3ii) if the erroneous-bit information correspond to all of the erroneous bits in the first set, then the further processing comprises performing one or more of a syndrome check and a cyclic redundancy check (CRC) on the modified codeword; and
(h3iii) if the erroneous-bit information does not correspond to all of the erroneous bits in the first set, then the further processing comprises performing decoding on the modified codeword.
9. The invention of claim 1 , wherein the erroneous-bit information comprises:
a unique identifier for the written encoded codeword;
an index value for each erroneous bit in the second set; and
an indication whether the second set corresponds to all of the erroneous bits in the first set.
10. The invention of claim 1 , wherein step (d) comprises:
(d1) selecting one or more erroneous bits in the first set;
(d2) generating a modified codeword based on the one or more selected erroneous bits;
(d3) performing decoding on the modified codeword to generate a candidate decoded codeword;
(d4) determining whether the candidate decoded codeword is a decoded correct codeword;
(d5) if the candidate decoded codeword is the decoded correct codeword, then generating the second set based on the one or more selected erroneous bits; and
(d6) if the candidate decoded codeword is not the decoded correct codeword, then repeating steps (d1)-(d4) for another one or more selected erroneous bits in the first set.
11. A machine-implemented method for generating a decoded codeword for a written encoded codeword stored in a storage medium, the written encoded codeword having one or more erroneous bits, the method comprising:
(a) generating a channel output codeword by reading the written encoded codeword from the storage medium;
(b) generating a derived codeword based on the channel output codeword;
(c) reading erroneous-bit information from the storage medium, wherein the erroneous-bit information corresponds to one or more erroneous bits in the written encoded codeword;
(d) generating a modified codeword based on the erroneous-bit information; and
(e) performing processing on the modified codeword to generate the decoded codeword.
12. The invention of claim 11 , wherein the written encoded codeword is a low-density parity-check codeword.
13. The invention of claim 11 , wherein step (b) comprises:
(b1) performing decoding on the channel output codeword to generate the derived codeword; and
(b2) determining that the derived codeword is not a decoded correct codeword.
14. The invention of claim 11 , wherein step (d) comprises modifying one or more bits in the derived codeword based on the erroneous-bit information to generate the modified codeword.
15. The invention of claim 11 , wherein step (e) comprises:
(e1) determining whether or not the erroneous-bit information corresponds to all of the erroneous bits in the written encoded codeword;
(e2) if the erroneous-bit information correspond to all of the erroneous bits in the written encoded codeword, then the processing comprises performing one or more of a syndrome check and a cyclic redundancy check (CRC) on the modified codeword; and
(e3) if the erroneous-bit information does not correspond to all of the erroneous bits in the written encoded codeword, then the processing comprises performing decoding on the modified codeword.
16. The invention of claim 11 , wherein the erroneous-bit information comprises:
a unique identifier for the written encoded codeword;
an index value for each erroneous bit in the written encoded codeword; and
an indication whether the erroneous-bit information corresponds to all of the erroneous bits in the written encoded codeword.