IP Library Granted Patent US 8,917,059
Granted Patent B2
US 8,917,059 · App. 13/003,662 · Granted Dec 23, 2014

Inter-module voltage balance correcting circuit of a power storage system

Inventor: Fumiaki Nakao (Shizuoka, JP)
Assignee: FDK Corporation
H02J7/0016H01M10/441H01M10/482H01M2010/4271
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Quick Facts
Patent No.
US 8,917,059
App. No.
13/003,662
Granted
Dec 23, 2014
Kind
B2
Abstract

Provided is an inter-module voltage balance correcting circuit of a power storage system including a plurality of storage modules connected in series, each of the storage modules including a plurality of storage cells connected in series. The inter-module voltage balance correcting circuit includes a resistance voltage dividing circuit (R 1 -R 2 ) that equally divides a series voltage across a first storage module and a second storage module connected in series; and a pair of transistors that are turned ON/OFF complementarily based on a voltage (Vp 1 -Vp 2 ) appearing between an intermediate connecting point (p 2 ) between the storage modules M 1 , M 2 in series and a voltage dividing point p 1 of the resistance voltage dividing circuit, and a bypass discharge resistive element is selectively connected to modules by turning ON/OFF the complementary transistors.

Claims (17)

1. An inter-module voltage balance correcting circuit of a power storage system including a plurality of storage modules connected in series, each of the storage modules including a plurality of storage cells connected in series, the inter-module voltage balance correcting circuit comprising:

a resistance voltage dividing circuit that equally divides a series voltage across a first storage module and a second storage module connected in series;

a pair of transistors that are turned ON/OFF in a complementary manner based on a voltage that appears between an intermediate connecting point between the first and second storage modules and a voltage dividing point of the resistance voltage dividing circuit, the pair of transistors having commonly connected bases and commonly connected emitters; and

a resistive element whose one end is connected to the commonly connected bases and whose other end is connected to the commonly connected emitters, the one end of the resistive element being further connected to the voltage dividing point, the other end of the resistive element being further connected to the intermediate connecting point,

one of the pair of transistors being turned ON in a case where a dividing voltage that appears at the voltage dividing point becomes higher than an intermediate voltage that appears at the intermediate connecting point and causing a bypass discharge resistive element to be connected to a storage module situated at a positive side of the series-connected storage modules,

the other of the pair of transistors being turned ON in a case where the dividing voltage becomes lower than the intermediate voltage and causing a bypass discharge resistive element to be connected to a storage module situated at a negative side of the series-connected storage modules.

2. The inter-module voltage balance correcting circuit according to claim 1 ,

wherein, in a case where three or more storage modules are connected in series, a correction circuit unit including the resistance voltage dividing circuit and the transistors is provided for every two storage modules situated next to each other in an order of connection in the series.

3. The inter-module voltage balance correcting circuit according to claim 2 ,

further comprising an electric current passage correction resistive element that equalizes a current passage condition of an electric current flowing through the resistance voltage dividing circuit of each of the correction circuit units.

4. The inter-module voltage balance correcting circuit according to claim 1 ,

wherein each of the pair of transistors is provided with a transistor added thereto that forms a multi-stage direct-coupled amplification circuit.

5. The inter-module voltage balance correcting circuit according to claim 4 ,

wherein the added transistor is a Darlington-connected bipolar transistor.

6. The inter-module voltage balance correcting circuit according to claim 1 ,

wherein each of the storage modules is provided with an overcharge protection circuit that monitors voltages of the plurality of storage cells connected in series individually and, in a case there is a cell having a high voltage, connects the cell to a bypass discharge resistive element, and

wherein, by being turned ON, the pair of transistors causes all of the bypass discharge resistive elements in the protection circuit to be connected at once to the cells in the modules.

Assignments (2)
CHANGE OF ADDRESS Recorded Jan 8, 2016
From: FDK CORPORATION
To: FDK CORPORATION
Reel/Frame 037952/0896 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 11, 2011
From: NAKAO, FUMIAKI
To: FDK CORPORATION
Reel/Frame 025619/0321 →
Priority Claims (1)
JP 2008-203270 · Aug 6, 2008 · national
Continuity (1)
Related Publication 20110109270A1 · May 12, 2011