SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
Generally, a power MOSFET mainly includes an active region occupying most of an internal region (a region where a gate electrode made of polysilicon or the like is integrated), and a surrounding gate contact region (where the gate electrode made of polysilicon or the like is derived outside a source metal covered region to make contact with a gate metal) (see FIG. 65 in a comparative example). Since the gate electrode made of polysilicon or the like has a stepped portion existing between both regions, a focus margin maybe reduced in a lithography step, including exposure or the like, for formation of a contact hole for a source or for a gate. The invention of the present application provides a semiconductor device having a trench gate type power MISFET with a gate electrode protruding from an upper surface of a semiconductor substrate, in which respective main upper surfaces of the gate electrode in an active region and a gate contact region are substantially at the same height.
1 - 10 . (canceled)
11 . A manufacturing method for a semiconductor device, the semiconductor device including (a) a semiconductor substrate with a device main surface; (b) an active region of a power MISFET arranged over the device main surface; (c) a gate contact region of the power MISFET arranged over the device main surface; (d) a trench provided across the active region and the gate contact region of the device main surface of the semiconductor substrate; (e) a gate insulating film formed at the inner surface of the trench; and (f) a gate electrode embedded in the trench via the gate insulating film, the gate electrode having an upper surface protruding upward from the device main surface, wherein respective uppermost surfaces of the gate electrode in the active region and the gate contact region are substantially at the same height to each other, the method comprising the steps of:
(I) forming a side wall spacer of a first insulating film around the gate electrode over the device main surface;
(II) after the step (I), forming a second insulating film substantially over the entire device main surface; and
(III) after the step (II), forming a first through hole reaching an upper surface of the gate electrode in the gate contact region, in the second insulating film.
12 . The manufacturing method for a semiconductor device according to claim 11 , further comprising a step of:
(IV) after the step (I) and before the step (II), forming an etching stopper film including silicon nitride as a principal component over the device main surface including upper surfaces of the gate electrode and of the side wall spacer.
13 . The manufacturing method for a semiconductor device according to claim 11 , further comprising a step of:
(V) forming a second through hole reaching the device main surface in the active region, in the second insulating film substantially at the same time as the step (III).
14 . The manufacturing method for a semiconductor device according to claim 13 , further comprising a step of:
(VI) after the step (III), extending the first through hole in the gate electrode.
15 . The manufacturing method for a semiconductor device according to claim 14 , further comprising a step of:
(VII) extending the second through hole across the device main surface substantially at the same time as the step (VI).
16 . A manufacturing method for a semiconductor device, the semiconductor device including (a) a semiconductor substrate with a device main surface; (b) an active region of a power MISFET arranged over the device main surface; (c) a gate contact region of the power MISFET arranged over the device main surface; (d) a trench provided across the active region and the gate contact region of the device main surface of the semiconductor substrate; (e) a gate insulating film formed at the inner surface of the trench; (f) a gate electrode embedded in the trench via the gate insulating film, the gate electrode having an upper surface protruding upward from the device main surface; and (g) a field insulating film provided over the device main surface of the semiconductor substrate in a part of the gate contact region, wherein an uppermost surface of the gate electrode is not substantially high as compared to an uppermost surface of the field insulating film, the method comprising the steps of:
(I) forming a first insulating film substantially over the entire device main surface; and
(II) after the step (I), forming a first through hole reaching an upper surface of the gate electrode in the gate contact region, in the first insulating film.
17 . The manufacturing method for a semiconductor device according to claim 16 , further comprising a step of:
(III) before the step (I), forming an etching stopper film including silicon nitride as a principal component over the device main surface including upper surfaces of the gate electrode and of the field insulating film.
18 . The manufacturing method for a semiconductor device according to claim 16 , further comprising a step of:
(IV) forming a second through hole reaching the device main surface in the active region, in the first insulating film substantially at the same time as the step (II).
19 . The manufacturing method for a semiconductor device according to claim 18 , further comprising a step of:
(V) after the step (II), extending the first through hole into an inside of the gate electrode.
20 . The manufacturing method for a semiconductor device according to claim 19 , further comprising a step of:
(VI) extending the second through hole across the device main surface substantially at the same time as the step (V).