IP Library Granted Patent US 8,102,035
Granted Patent B2
US 8,102,035 · App. 13/084,600 · Granted Jan 24, 2012

Method of manufacturing a semiconductor device

Assignee: Renesas Electronics Corporation
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Quick Facts
Patent No.
US 8,102,035
App. No.
13/084,600
Granted
Jan 24, 2012
Kind
B2
Abstract

According to the method of manufacturing a semiconductor device, a lead frame is provided wherein the thickness of a tab-side end portion of a silver plating for wire connection formed on each suspending lead 1 e is smaller than that of a silver plating formed on each lead. Thereafter, a semiconductor chip is mounted onto a tab. In this case, since the entire surface of the silver plating on the suspending lead 1 e is in a crushed state, it is possible to prevent contact of the semiconductor chip with the silver plating when mounting the chip onto the tab. Consequently, in a die bonding process, the semiconductor chip can slide on the tab without contacting the silver plating and thereby making it possible to diminish damage to the semiconductor chip when mounted onto the tab and hence to possibly prevent cracking or chipping of the chip when assembling the semiconductor device.

Claims (17)

1. A semiconductor device comprising:

a chip mounting portion;

a plurality of leads arranged around the chip mounting portion;

a plurality of suspending leads for supporting the chip mounting portion;

a semiconductor chip mounted over the chip mounting portion via a die bonding material; and

a plurality of wires electrically connecting a plurality of pads formed on a main surface of the semiconductor chip with the leads;

wherein each of the suspending leads has a bent portion;

wherein a first metal film is formed over a part of each of the suspending leads including the bent portion;

wherein each first metal film has one end and another end portion opposite to the one end portion;

wherein the one end portion is positioned closer to the chip mounting portion side than the another end portion;

wherein a second metal film is formed over a part of each of the leads;

wherein a thickness of the one end portion of each first metal film is less than that of each second metal film; and

wherein the semiconductor chip is mounted over the chip mounting portion such that the one end of each of the metal plating films formed over the suspending leads is overlapped with the semiconductor chip.

2. A semiconductor device according to claim 1 , wherein the pads of the semiconductor chip are electrically connected with the leads via the wires and each second metal film, respectively.

3. A semiconductor device according to claim 1 , wherein the semiconductor chip and the plurality of wires are sealed with resin;

wherein a part of a back surface of the semiconductor chip opposite to the main surface of the semiconductor chip is contacted with the resin.

4. A semiconductor device according to claim 1 , wherein a size, in a plan view, of the chip mounting portion is smaller than that of the semiconductor chip.

Assignments (1)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
Priority Claims (1)
JP 2005-126392 · Apr 25, 2005 · national
Continuity (4)
Continuation 12401075 · Mar 10, 2009
Continuation 12191503 · Aug 14, 2008
Continuation 11409014 · Apr 24, 2006
Related Publication 20110186976A1 · Aug 4, 2011