IP Library Granted Patent US 8,741,727
Granted Patent B2
US 8,741,727 · App. 13/106,129 · Granted Jun 3, 2014

Method of manufacturing semiconductor device capable of reducing a size of the semiconductor device

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Quick Facts
Patent No.
US 8,741,727
App. No.
13/106,129
Granted
Jun 3, 2014
Kind
B2
Abstract

A method of manufacturing a semiconductor device includes forming a flash memory cell in a first region, forming a first electrode of a capacitor in a second region, forming a first silicon oxide film, a silicon nitride film, and a second silicon oxide film in this order as a second insulating film, removing the silicon nitride film and the second silicon oxide film in a partial region of the first electrode, wet-etching a first insulating film and the second insulating film in the third region, forming a second electrode of the capacitor, and etching and removing the first silicon oxide film in the partial region.

Claims (79)

1. A method of manufacturing a semiconductor device comprising:

forming a first insulating film in a first region, a second region, and a third region of a semiconductor substrate;

forming a flash memory cell including a floating gate, a second insulating film, and a control gate on the first insulating film in the first region;

forming a first electrode of a capacitor on the first insulating film in the second region;

forming a first silicon oxide film, a silicon nitride film on the first silicon oxide film, and a second silicon oxide film on the silicon nitride film as the second insulating film on the first electrode and on the first insulating film in the third region;

selectively dry-etching the second insulating film on a partial region of the first electrode to remove the silicon nitride film and the second silicon oxide film with the first silicon oxide film on the partial region of the first electrode being left;

selectively wet-etching and removing the first insulating film and the second insulating film in the third region with the first silicon oxide film on the partial region of the first electrode being covered by a mask and thereby being left;

forming a third insulating film by subjecting a surface of the semiconductor substrate in the third region to thermal oxidation after the selectively wet-etching and removing the first insulating film and the second insulating film;

forming a first gate electrode on the third insulating film;

forming a second electrode of the capacitor on a region of the second insulating film on the first electrode other than the partial region;

etching and removing the first silicon oxide film in the partial region after forming the second electrode;

forming a fourth insulating film in the first region, the second region, and the third region after forming the second electrode and the first gate electrode;

forming a hole in the fourth insulating film in the partial region; and

forming a conductive plug in the hole.

2. The method of manufacturing a semiconductor device according to claim 1 , further comprising forming a well as an electrode of the capacitor in the semiconductor substrate in the second region.

3. The method of manufacturing a semiconductor device according to claim 1 , wherein

in the forming of the first insulating film, the first insulating film is formed in a fourth region of the semiconductor substrate,

in the forming of the second insulating film, the second insulating film is formed on the first insulating film in the fourth region,

in the selectively wet-etching and removing of the first insulating film and the second insulating film, the first insulating film and the second insulating film in the third region are etched and removed while the second insulating film in the second region and the fourth region is covered with a first mask pattern,

after the first mask pattern is removed and the third insulating film is formed, the first insulating film and the second insulating film in the fourth region are selectively wet-etched and removed while the third insulating film is covered with a second mask pattern,

after the first insulating film and the second insulating film in the fourth region are selectively wet-etched and removed, the surface of the semiconductor substrate in the fourth region is subjected to thermal oxidation to form a fifth insulating film in the semiconductor substrate of the fourth region thinner than the third insulating film, and

a second gate electrode is formed on the fifth insulating film.

4. The method of manufacturing a semiconductor device according to claim 3 , further comprising:

forming an element isolation insulating film in the semiconductor substrate in the fourth region before the forming the first insulating film;

forming a second conductive film on the fifth insulating film;

forming an anti-reflection film on the second conductive film by a coating method;

forming a third mask pattern on the anti-reflection film; and

etching the second conductive film by using the third mask pattern as a mask to form the second gate electrode.

5. The method of manufacturing a semiconductor device according to claim 1 , wherein the etching and removing of the first silicon oxide film in the partial region is performed by wet-etching.

6. The method of manufacturing a semiconductor device according to claim 5 further comprising:

forming an insulating sidewall on a side surface of the second electrode, wherein

the etching and removing of the first silicon oxide film in the partial region is performed by using the insulating sidewall as a mask.

7. The method of manufacturing a semiconductor device according to claim 6 , wherein, in the etching and removing of the first silicon oxide film in the partial region, the third insulating film at both sides of the first gate electrode is etched to expose the surface of the semiconductor substrate at both sides of the first gate electrode.

8. The method of manufacturing a semiconductor device according to claim 1 , wherein the forming of the first electrode of the capacitor includes:

forming a first conductive film on the first insulating film in the first region, the second region, and the third region; and

patterning the first conductive film to form the first electrode in the second region with the first conductive film being left in the first region and to remove the first conductive film in the third region.

9. The method of manufacturing a semiconductor device according to claim 8 , further comprising:

patterning the first conductive film left in the first region into the floating gate.

10. The method of manufacturing a semiconductor device according to claim 1 , wherein the forming of the second electrode and the forming of the first gate electrode are performed as a single step.

11. The method of manufacturing a semiconductor device according to claim 10 , further comprising:

forming a second conductive film on the second insulating film in the second region and on the third insulating film in the third region after the selectively dry-etching the second insulating film on the partial region; and

patterning the second conductive film to form the second electrode in the second region and to form the first gate electrode in the third region.

12. The method of manufacturing a semiconductor device according to claim 1 , wherein, in the forming of the second electrode, an opening is formed in the second electrode in the partial region.

13. The method of manufacturing a semiconductor device according to claim 1 , wherein the forming of the first insulating film is performed by subjecting the surface of the semiconductor substrate in the first region, the second region, and the third region to thermal oxidation.

14. A method of manufacturing a semiconductor device comprising:

forming a first insulating film in a first region, a second region, and a third region of a semiconductor substrate;

forming a first conductive film on the first insulating film in the first region, the second region, and the third region;

patterning the first conductive film to form a first electrode of a capacitor in the second region and to remove the first conductive film in the third region with the first conductive film being left in the first region;

forming a first silicon oxide film, a silicon nitride film on the first silicon oxide film, and a second silicon oxide film on the silicon nitride film as a second insulating film on the first conductive film in the first region, on the first electrode in the second region, and on the first insulating film in the third region;

selectively dry-etching the second insulating film on a partial region of the first electrode and in the third region to remove the silicon nitride film and the second silicon oxide film with the first silicon oxide film on the partial region of the first electrode being left;

selectively removing the first insulating film and the first silicon oxide film in the third region with the first silicon oxide film on the partial region of the first electrode being covered by a mask and thereby being left;

subjecting a surface of the semiconductor substrate in the third region to thermal oxidation to form a third insulating film in the semiconductor substrate of the third region after removing the first insulating film and the first silicon oxide film;

forming a second conductive film on the second insulating film in the first region, on the second insulating film in the second region, and on the third insulating film in the third region;

patterning the first conductive film, the second insulating film, and the second conductive film in the first region to form a flash memory cell including a floating gate, the second insulating film, and a control gate;

patterning the second conductive film in the second region and the third region to form a second electrode of the capacitor in the second region except for the partial region and to form a first gate electrode in the third region;

wet-etching and removing the first silicon oxide film in the partial region after forming the second electrode and the first gate electrode;

forming a fourth insulating film in the first region, the second region, and the third region after forming the second electrode and the first gate electrode;

forming a hole in the fourth insulating film in the partial region; and

forming a conductive plug in the hole.

15. The method of manufacturing a semiconductor device according to claim 14 , further comprising:

forming a well as an electrode of the capacitor in the semiconductor substrate in the second region.

16. The method of manufacturing a semiconductor device according to claim 14 , wherein

in the forming of the first insulating film, the first insulating film is formed in a fourth region of the semiconductor substrate,

in the forming of the second insulating film, the second insulating film is formed on the first insulating film in the fourth region,

in the selectively removing of the first insulating film and the second insulating film, the first insulating film and the second insulating film in the third region are etched and removed while the second insulating film in the second region and the fourth region is covered with a first mask pattern,

after the first mask pattern is removed and the third insulating film is formed, the first insulating film and the second insulating film in the fourth region are selectively wet-etched and removed while the third insulating film is covered with a second mask pattern,

after the first insulating film and the second insulating film in the fourth region are selectively wet-etched and removed, the surface of the semiconductor substrate in the fourth region is subjected to thermal oxidation to form a fifth insulating film in the semiconductor substrate of the fourth region thinner than the third insulating film, and

a second gate electrode is formed on the fifth insulating film.

17. The method of manufacturing a semiconductor device according to claim 16 , further comprising:

forming an element isolation insulating film in the semiconductor substrate in the fourth region before the forming the first insulating film;

forming a second conductive film on the fifth insulating film;

forming an anti-reflection film on the second conductive film by a coating method;

forming a third mask pattern on the anti-reflection film; and

etching the second conductive film by using the third mask pattern as a mask to form the second gate electrode.

18. The method of manufacturing a semiconductor device according to claim 14 , wherein the etching and removing of the first silicon oxide film in the partial region is performed by wet-etching.

19. The method of manufacturing a semiconductor device according to claim 18 further comprising:

forming an insulating sidewall on a side surface of the second electrode, wherein

the etching and removing of the first silicon oxide film in the partial region is performed by using the insulating sidewall as a mask.

20. The method of manufacturing a semiconductor device according to claim 19 , wherein, in the etching and removing of the first silicon oxide film in the partial region, the third insulating film at both sides of the first gate electrode is etched to expose the surface of the semiconductor substrate at both sides of the first gate electrode.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2025
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 073964/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 27, 2024
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 069454/0333 →
MERGER Recorded May 24, 2023
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU LIMITED
Reel/Frame 064221/0545 →
CHANGE OF NAME AND CHANGE OF ADDRESS Recorded Jul 16, 2020
From: AIZU FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 053481/0962 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2020
From: FUJITSU SEMICONDUCTOR LIMITED
To: AIZU FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 053209/0468 →
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 16, 2011
From: ARIYOSHI, JUNICHI; EMA, TAIJI; ANEZAKI, TORU
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 026281/0239 →