IP Library Granted Patent US 8,865,536
Granted Patent B2
US 8,865,536 · App. 13/170,711 · Granted Oct 21, 2014

Semiconductor device and manufacturing method thereof

Inventor: Tatsuya Sugimachi (Yokohama, JP)
Assignee: Fujitsu Semiconductor Limited
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Quick Facts
Patent No.
US 8,865,536
App. No.
13/170,711
Granted
Oct 21, 2014
Kind
B2
Abstract

As for a bypass capacitor, a first capacitor insulating film, together with a tunnel insulating film of a storage element, is formed of a first insulating film, a first electrode being a lower electrode, together with floating gate electrodes of the storage element, is formed of a doped·amorphous silicon film (a crystallized one), a second capacitor insulating film, together with a gate insulating film of transistors of 5 V in a peripheral circuit, is formed of a second insulating film, and a second electrode being an upper electrode, together with control gate electrodes of the storage element and gate electrodes of the transistors in the peripheral circuit, is formed of a polycrystalline silicon film.

Claims (44)

1. A manufacturing method of a semiconductor device comprising:

forming a first insulating material on a semiconductor substrate that comprises a first region, a second region and a third region;

forming a first conductive material on the first insulating material;

patterning the first conductive material and the first insulating material to expose the semiconductor substrate of the second region, to form a first insulating film on the semiconductor substrate of the first region and a first gate on the first insulating film, and to form a fourth insulating film on the semiconductor substrate of the third region and first electrode on the fourth insulating film;

forming a second insulating material on the semiconductor substrate of the second region, the first gate and the first electrode;

patterning the second insulating material to form a second insulating film on the first gate and to remove the second insulating material on the first electrode and the semiconductor substrate of the second region;

forming a third insulating film on the semiconductor substrate of the second region and a fifth insulating film on the first electrode by oxidizing the semiconductor substrate of the second region and the first electrode after patterning the second insulating material;

forming a second conductive material on the second insulating film, the third insulating film and the fifth insulating film after oxidizing the semiconductor substrate and the first electrode;

patterning the second conductive material to form a second gate on the second insulating film, a third gate on the third insulating film and a second electrode on the fifth insulating film.

2. The manufacturing method of the semiconductor device according to claim 1 , wherein

the semiconductor substrate further comprises a fourth region; and

the second conductive material is formed in the fourth region, and

the manufacturing method of the semiconductor device according to claim 1 further comprising

forming a sixth insulating film that has a thickness different from a thickness of the third insulating film by oxidizing the semiconductor substrate of the fourth region after patterning the second insulating material; and

forming a fourth gate above the sixth insulating film by patterning the second conductive material.

3. The manufacturing method of the semiconductor device according to claim 2 , wherein

a thickness of the fifth insulating film is different from the thickness of the sixth insulating film.

4. The manufacturing method of the semiconductor device according to claim 1 , wherein

the third insulating film and fifth insulating film are formed by a radical oxidation method.

5. The manufacturing method of the semiconductor device according to claim 1 , wherein

the fifth insulating film is thicker than the sixth insulating film.

6. The manufacturing method of the semiconductor device according to claim 1 , further comprising

forming an opening in the second electrode that expose a part of the first electrode.

7. The manufacturing method of the semiconductor device according to claim 6 , wherein

forming the opening by etching the second conductive material on the first electrode and forming the third gate by etching the second conductive material in the second region are performed simultaneously.

8. The manufacturing method of the semiconductor device according to claim 2 , further comprising

forming an opening in the second electrode that expose a part of the first electrode.

9. The manufacturing method of the semiconductor device according to claim 8 , wherein

forming the opening by etching the second conductive material on the first electrode, forming the third gate by etching the second conductive material in the second region and forming the fourth gate by etching the second conductive material in the fourth region are performed simultaneously.

10. The manufacturing method of the semiconductor device according to claim 1 , wherein

the first insulating film and the fourth insulating film are formed simultaneously.

11. The manufacturing method of the semiconductor device according to claim 1 , wherein

the second gate and the second electrode are formed simultaneously.

12. The manufacturing method of the semiconductor device according to claim 1 , wherein

the third insulating film and the fifth insulating film are formed simultaneously.

13. The manufacturing method of the semiconductor device according to claim 2 , wherein

forming the third insulating film and the fifth insulating film is performed by a plurality of times of oxidizing of the semiconductor substrate of the second region and the first gate, and

forming the sixth insulating film is performed by one time of oxidizing of the semiconductor substrate of the fourth region.

14. The manufacturing method of the semiconductor device according to claim 13 , wherein

one of the plurality of times of oxidizing and the one time of oxidizing are performed simultaneously.

15. The manufacturing method of the semiconductor device according to claim 1 , wherein

an upper surface of the first electrode is exposed by patterning the second insulating material.

16. The manufacturing method of the semiconductor device according to claim 1 , wherein

oxidizing the semiconductor substrate of the second region and the first electrode is performed under the second insulating film exposed.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2025
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 073964/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 27, 2024
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 069454/0333 →
MERGER Recorded May 24, 2023
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU LIMITED
Reel/Frame 064221/0545 →
CHANGE OF NAME AND CHANGE OF ADDRESS Recorded Jul 16, 2020
From: AIZU FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 053481/0962 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2020
From: FUJITSU SEMICONDUCTOR LIMITED
To: AIZU FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 053209/0468 →
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2011
From: SUGIMACHI, TATSUYA
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 026557/0460 →
Priority Claims (1)
JP 2010-217026 · Sep 28, 2010 · national
Continuity (1)
Related Publication 20120074478A1 · Mar 29, 2012