IP Library Granted Patent US 8,367,464
Granted Patent B2
US 8,367,464 · App. 13/209,809 · Granted Feb 5, 2013

Nano-dimensional non-volatile memory cells

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Quick Facts
Patent No.
US 8,367,464
App. No.
13/209,809
Granted
Feb 5, 2013
Kind
B2
Abstract

A non-volatile memory cell that includes a first electrode; a second electrode; and an electrical contact region that electrically connects the first electrode and the second electrode, the electrical contact region has a end portion and a continuous side portion, and together, the end portion and the continuous side portion form an open cavity, wherein the memory cell has a high resistance state and a low resistance state that can be switched by applying a voltage across the first electrode and the second electrode.

Claims (29)

1. A method of making a non-volatile memory cell comprising:

forming a first electrode;

forming an electrical contact region, the electrical contact region being disposed adjacent to the first electrode, the electrical contact region having an end portion and a continuous side wall portion, and together, the end portion and the continuous side wall portion form an open cavity, wherein the electrical contact region has a thickness of about 2 nm to about 50, wherein forming the electrical contact region comprises:

depositing an insulating material;

forming a first void in the insulating material;

depositing an electrical contact material comprising a conductive metal on at least the surfaces of the first void to form the electrical contact region;

depositing memory material on the electrical contact material; and then

forming a second electrode, the second electrode being disposed adjacent to the electrical contact region.

2. The method according to claim 1 , wherein the electrical contact material is a common layer of conductive material.

3. The method according to claim 2 , wherein the common layer of conductive material can serve as a first electrode to a plurality of non-volatile memory cells.

4. The method according to claim 1 , wherein forming the first void comprises patterning the insulating material.

5. The method according to claim 1 , wherein the insulating material is alumina or silica.

6. The method according to claim 1 , wherein the electrical contact material is deposited using PVD, ionized plasma based sputtering, long throw sputtering, CVD, or ALD.

7. The method according to claim 1 further comprising removing at least a portion of the electrical contact material.

8. The method according to claim 7 , wherein removing at least a portion of the electrical contact material comprises using CMP.

9. A method of making a non-volatile memory cell comprising:

forming a first electrode;

forming an electrical contact region, the electrical contact region being disposed adjacent to the first electrode, the electrical contact region having an end portion and a continuous side wall portion, and together, the end portion and the continuous side wall portion form an open cavity, wherein the electrical contact region has a thickness of about 2 nm to about 50, wherein forming the electrical contact region comprises:

depositing an insulating material;

forming a first void in the insulating material;

depositing an electrical contact material comprising a conductive metal on at least the surfaces of the first void to form the electrical contact region, wherein the conductive metal is a common layer of conductive metal;

depositing memory material on the electrical contact material; and then

forming a second electrode, the second electrode being disposed adjacent to the electrical contact region.

10. The method according to claim 9 , wherein the common layer of conductive material can serve as a first electrode to a plurality of non-volatile memory cells.

11. The method according to claim 9 , wherein forming the first void comprises patterning the insulating material.

12. The method according to claim 9 , wherein the insulating material is alumina or silica.

13. The method according to claim 9 , wherein the electrical contact material is deposited using PVD, ionized plasma based sputtering, long throw sputtering, CVD, or ALD.

14. The method according to claim 9 further comprising removing at least a portion of the electrical contact material.

15. The method according to claim 14 , wherein removing at least a portion of the electrical contact material comprises using CMP.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2025
From: THE BANK OF NOVA SCOTIA
To: SEAGATE TECHNOLOGY US HOLDINGS, INC.; EVAULT, INC. (F/K/A I365 INC.); SEAGATE TECHNOLOGY LLC
Reel/Frame 070363/0903 →
RELEASE OF SECURITY INTEREST Recorded Jul 23, 2024
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: SEAGATE TECHNOLOGY LLC; EVAULT INC
Reel/Frame 068457/0076 →
RELEASE OF SECURITY INTEREST Recorded May 20, 2024
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: SEAGATE TECHNOLOGY LLC; EVAULT, INC. (F/K/A I365 INC.); SEAGATE TECHNOLOGY US HOLDINGS, INC.
Reel/Frame 067471/0955 →
SECURITY AGREEMENT Recorded Oct 15, 2012
From: SEAGATE TECHNOLOGY LLC; EVAULT, INC. (F/K/A I365 INC.); SEAGATE TECHNOLOGY US HOLDINGS, INC.
To: THE BANK OF NOVA SCOTIA, AS ADMINISTRATIVE AGENT
Reel/Frame 029127/0527 →
SECOND LIEN PATENT SECURITY AGREEMENT Recorded Oct 15, 2012
From: SEAGATE TECHNOLOGY LLC; EVAULT, INC. (F/K/A I365 INC.); SEAGATE TECHNOLOGY US HOLDINGS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 029253/0585 →