IP Library Granted Patent US 8,964,464
Granted Patent B2
US 8,964,464 · App. 13/214,485 · Granted Feb 24, 2015

System and method for accelerated sampling

Inventors: Hanan Weingarten (Herzelia, IL); Erez Sabbag (Kiryat Tivon, IL)
Assignee: Densbits Technologies Ltd.
G11C11/5642G11C16/26
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Quick Facts
Patent No.
US 8,964,464
App. No.
13/214,485
Granted
Feb 24, 2015
Kind
B2
Abstract

A system and method for reading memory cells in a multi-level cell memory device. A set of thresholds may be received for reading a current page of the memory cells. The set of threshold may include hard decision thresholds for hard decoding, soft decision thresholds for soft decoding, erase thresholds for erase decoding and/or other combinations of thresholds. The set of thresholds may be divided into a plurality of groups of thresholds. The current page may be simultaneously read using multiple thresholds, where each of the multiple thresholds is divided into a different group of thresholds.

Claims (29)

1. A method for reading memory cells in a memory device, the method comprising:

receiving a set of thresholds for reading a current page of the memory cells;

dividing the set of thresholds into a plurality of groups of thresholds; and

simultaneously reading the current page using multiple thresholds, where each of the multiple thresholds is divided into a different group of thresholds.

2. The method of claim 1 comprising receiving a single multi-threshold read instruction defining the multiple thresholds to trigger simultaneously reading the multiple thresholds.

3. The method of claim 2 , wherein the single multi-threshold read instruction is a native instruction in the memory device.

4. The method of claim 1 comprising iteratively reading the current page using different combinations of multiple thresholds until the current page is read with all thresholds in the set.

5. The method of claim 1 , wherein simultaneously reading using multiple thresholds comprises reading using the multiple thresholds in a single read instruction, wherein during the single read instruction the current page is separately read using each individual threshold in rapid-fire succession.

6. The method of claim 1 comprising labeling thresholds differently in each group, wherein the simultaneously read multiple thresholds each have a different group label.

7. The method of claim 1 , wherein each different label is assigned to a bin for a different bit value for one or more pages.

8. The method of claim 7 , wherein the labels include a group value and a bin value.

9. The method of claim 1 , wherein the simultaneously read multiple thresholds are separated by equally spaced voltage gaps.

10. The method of claim 1 , wherein the simultaneously read multiple thresholds are separated by differently spaced voltage gaps.

11. The method of claim 1 , wherein the thresholds in the set are divided at one or more hard decision thresholds for reading one or more pages.

12. The method of claim 11 , wherein the current page is an LSB page and the thresholds in the set are divided at hard decision thresholds for MSB and CSB pages.

13. The method of claim 11 , wherein the current page is an MSB page and the thresholds in the set are divided at hard decision thresholds for MSB and CSB pages.

14. The method of claim 1 comprising reading multiple pages of the memory cells in parallel.

15. The method of claim 1 , wherein the set of thresholds includes hard decision thresholds and soft decision thresholds.

16. The method of claim 15 , wherein the set of thresholds includes 2^N−1 thresholds for generating N-bit resolution soft bit information.

17. The method of claim 1 , wherein the set of thresholds includes hard decision thresholds and erase thresholds, wherein two erase thresholds surround each hard decision threshold to form a predefined voltage range of thresholds sufficiently close to the hard decision threshold surrounded thereby, wherein the erase thresholds are used to generate erase bit information indicating if cells are within the predefined voltage range.

18. The method of claim 17 , comprising evaluating the reliability of one or more hard thresholds by simultaneously reading the current page using two erase thresholds surrounding each hard threshold and generating a set of reliable cells having a threshold value within the predefined voltage range.

19. The method of claim 18 , comprising repeatedly reading the current page using erase thresholds surrounding all heard decision thresholds and operating on results from said repeatedly reading to generate a set of all reliable cells having a threshold value within the predefined voltage range.

20. The method of claim 1 , wherein the multiple thresholds are simultaneously sampled to simultaneously compute the number of cells in multiple bins.

21. The method of claim 20 comprising:

reading each page of the memory cells simultaneously using a first set of multiple thresholds with voltages equal to lower voltages of two or more of the multiple bins;

counting the number of the memory cells in each page that conduct using the first set of multiple thresholds;

reading each page of the memory cells simultaneously using a second set of multiple thresholds with voltages equal to upper voltages of the two or more bins;

counting the number of the memory cells in each page that conduct using the second set of multiple thresholds; and

determining the number of cell in each of the two or more bins to be the difference between the number of memory cells counted for each bin using the first and second sets of threshold values.

Assignments (9)
MERGER Recorded Mar 3, 2023
From: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED; BROADCOM INTERNATIONAL PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 062952/0850 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2020
From: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
To: BROADCOM INTERNATIONAL PTE. LTD.
Reel/Frame 053771/0901 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047422 FRAME: 0464. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0702 →
MERGER Recorded Oct 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047422/0464 →
RELEASE OF SECURITY INTEREST Recorded Jan 11, 2017
From: KREOS CAPITAL IV (EXPERT FUND) LIMITED
To: DENSBITS TECHNOLOGIES LTD.
Reel/Frame 041339/0921 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 27, 2016
From: DENSBITS TECHNOLOGIES LTD.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 037622/0224 →
SECURITY INTEREST Recorded Mar 18, 2015
From: DENSBITS TECHNOLOGIES LTD.
To: KREOS CAPITAL IV (EXPERT FUND) LIMITED
Reel/Frame 035222/0547 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 16, 2014
From: WEINGARTEN, HANAN; SABBAG, EREZ
To: DENSBITS TECHNOLOGIES LTD.
Reel/Frame 034180/0151 →
SECURITY INTEREST Recorded Jul 30, 2014
From: DENSBITS TECHNOLOGIES LTD.
To: KREOS CAPITAL IV (EXPERT FUND) LIMITED
Reel/Frame 033444/0628 →
Continuity (2)
Provisional Application 61376584 · Aug 24, 2010
Related Publication 20120051144A1 · Mar 1, 2012