IP Library Granted Patent US 8,718,038
Granted Patent B2
US 8,718,038 · App. 13/219,211 · Granted May 6, 2014

Node system and supervisory node

Inventors: Kenji Suina (Yokohama, JP); Takashi Arai (Yokohama, JP); Koichi Mita (Yokohama, JP); Akira Shimamura (Yokohama, JP); Hidetoshi Ishikawa (Yokohama, JP); Takashi Moriya (Yokohama, JP); Yuuki Nozawa (Yokohama, JP); Hideki Kondo (Yokohama, JP)
Assignee: Spansion LLC
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Quick Facts
Patent No.
US 8,718,038
App. No.
13/219,211
Granted
May 6, 2014
Kind
B2
Abstract

A node system includes a first node, a second node, and a supervisory node which transmit frames while increasing or decreasing the cycle microtick count, and determines reduced cycle microtick counts by subtracting or adding a rate correction limit value from or to the cycle microtick count of the supervisory node when reception of the first frame transmitted by the first node stop and the cycle microtick count of the supervisory node when reception of the first and second frames stop.

Claims (37)

1. A node system comprising a plurality of nodes that are connected via a transmission line, each of the plurality of nodes including,

a clock generator, and a communication controller configured to transmit a frame in a slot assigned based on a microtick generated every time the clock generator generates a first certain number of clocks in a continuously repeated cycle, and to manage an initial value of a cycle microtick count corresponding to a cycle length of the cycle and a rate correction value for the initial value, wherein

the plurality of nodes includes:

a first node configured to transmit a first frame in a first slot, to repeatedly correct a first rate correction value so that cycles of the plurality of nodes synchronize, to stop transmission of the first frame when an absolute value of the first rate correction value exceeds a certain rate correction limit value, and to transmit the first frame in the first slot based on the corrected first rate correction value when the absolute value is within the rate correction limit value;

a second node configured to transmit a second frame in a second slot, to repeatedly correct a second rate correction value so that cycles of the plurality of nodes synchronize, to stop transmission of the second frame when an absolute value of the second rate correction value exceeds the rate correction limit value, and to transmit the second frame in the second slot based on the corrected second rate correction value when the absolute value is within the rate correction limit value; and

a supervisory node configued to transmit a third frame in a third slot, to transmit the third frame in the third slot while increasing or decreasing the cycle microtick count, and to determine reduced cycle microtick counts by subtracting or adding the rate correction limit value from or to the cycle microtick count of the supervisory node when reception of the first and second frames stop.

2. The node system according to claim 1 , wherein

the supervisory node further causes the first and second nodes which have stopped transmission of the first and second frames to restart transmission of the first and second frames, and correction of the first and second rate correction values, and

sets an intermediate value of the reduced cycle microtick counts as a cycle microtick count, and repeatedly transmits the third frame in the third slot.

3. The node system according to claim 2 , wherein the supervisory node repeatedly transmits the third frame in the third slot after causing the first and second nodes which have stopped transmission of the first and second frames to restart transmission of the first and second frames, and correction of the first and second rate correction values.

4. The node system according to claim 2 , wherein

the supervisory node further sets the intermediate value as a cycle microtick count after the reception of the first and second frames stops, and starts transmission of the third frame in the third slot;

then causes the first and second nodes which have stopped transmission of the first and second frames to set the first and second rate correction values so that the cycle length thereof matches the cycle length of the supervisory node; and

then causes the first and second nodes to restart the transmission of the first and second frames and correction of the first and second rate correction values.

5. The node system according to claim 1 , wherein for each cycle pair, the supervisory node delays or advances end of a preceding cycle of the cycle pair by a second certain number of microticks, advances or delays end of a later cycle of the cycle pair by the second certain number of microticks, and transmits the third frame in the third slot while repeating increase or decrease of the cycle microtick count thereafter.

6. The node system according to claim 1 , wherein

the intermediate value is a fault-tolerant mid-point value generated by deleting a third certain number of data according to a number of the reduced cycle microtick counts in order from a maximum value to a minimum value of the reduced cycle microtick counts and deleting the third certain number of data from the minimum value to the maximum value, and rounding up or rounding off a mean value of a maximum value and a minimum value of remaining reduced cycle microtick counts.

7. The node system according to claim 1 , wherein the intermediate value is a value obtained by rounding up or off a mean value of the reduced cycle microtick counts.

8. The node system according to claim 1 , wherein the third slot has a plurality of slots, and the third frame has a plurality of frames.

9. The node system according to claim 1 , wherein the supervisory node further transmits the third frame in the third slot while repeatedly correcting a third rate correction value so that cycles of a plurality of nodes synchronize; and determines the reduced microtick counts when determination is made that each cycle length of the plurality of nodes is in a range of a certain width continuously for a certain number of times or more.

10. A supervisory node comprising:

a clock generator; and

a communication controller configured to receive first and second frames in first and second slots which are assigned on a basis of a microtick generated every time the clock generator generates a first certain number of clocks in continuously repeated cycles, to transmit a third frame in a third slot assigned based on the microtick, and to manage an initial value of a cycle microtick count corresponding to a cycle length of each of the cycles and a rate correction value for the initial value, wherein

the third frame is transmitted in the third slot while increasing or decreasing the cycle microtick count, and reduced cycle microtick counts are determined by subtracting or adding a certain rate correction limit value from or to the cycle microtick count at each of time when reception of the first frame stops and time when the second frame stops.

11. The supervisory node according to claim 10 , which further causes the first and second nodes which have stopped transmission of the first and second frames to restart transmission of the first and second frames, and correction of the first and second rate correction values; and

sets an intermediate value of the reduced cycle microtick counts as a cycle microtick count of this supervisory node, and repeatedly transmits the third frame in the third slot.

12. The supervisory node according to claim 10 , which, for each cycle pair, delays or advances end of a preceding cycle of the cycle pair by a second certain number of microticks, advances or delays end of the later cycle of the cycle pair by the second certain number of microticks, and transmits the third frame in the third slot while repeating an increase or decrease of the cycle microtick count thereafter.

13. A synchronization method executed by a plurality of nodes, wherein

each of the plurality of nodes includes a first node, a second node, and a supervisory node, the method comprising:

transmitting, by each of the plurality of nodes, a frame in a slot assigned on a basis of a microtick generated every time a certain number of clocks are generated in a continuously repeated cycles, and managing an initial value of a cycle microtick count corresponding to a cycle length of each of the cycles and a rate correction value for the initial value;

correcting, by the first node, a first rate correction value repeatedly so that cycles of the plurality of nodes synchronize, and stopping transmission of the first frame when an absolute value of the first rate correction value exceeds a certain rate correction limit value, and transmitting the first frame in the first slot based on the corrected first rate correction value when the absolute value is within the rate correction limit value;

correcting, by the second node, a second rate correction value repeatedly so that cycles of the plurality of nodes synchronize, stopping transmission of the second frame when an absolute value of the second rate correction value exceeds the rate correction limit value, and transmitting the second frame in the second slot based on the corrected second rate correction value when the absolute value is within the rate correction limit value; and

transmitting, by the supervisory node, the third frame in the third slot while increasing or decreasing the cycle microtick count, and determining reduced cycle microtick counts by subtracting or adding the rate correction limit value from or to cycle the microtick count of the supervisory node when reception of the first and second frames stop.

14. The synchronization method according to claim 13 , wherein

the supervisory node further causes the first and second nodes which have stopped transmission of the first and second frames to restart transmission of the first and second frames, and to correct the first and second rate correction values;

sets a intermediate value of the reduced cycle microtick counts as a cycle microtick count; and

repeatedly transmits the third frame in the third slot.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 040911/0238 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS Recorded Aug 11, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 039708/0001 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: SPANSION LLC
Reel/Frame 031205/0461 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2011
From: SUINA, KENJI; ARAI, TAKASHI; MITA, KOICHI; SHIMAMURA, AKIRA; ISHIKAWA, HIDETOSHI; MORIYA, TAKASHI; NOZAWA, YUUKI; KONDO, HIDEKI
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 026823/0860 →
Priority Claims (1)
JP 2010-265643 · Nov 29, 2010 · national
Continuity (1)
Related Publication 20120134457A1 · May 31, 2012