IP Library Granted Patent US 8,301,830
Granted Patent B2
US 8,301,830 · App. 13/271,726 · Granted Oct 30, 2012

Wear leveling technique for storage devices

Assignee: Seagate Technology LLC
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,301,830
App. No.
13/271,726
Granted
Oct 30, 2012
Kind
B2
Abstract

A method for managing wear levels in a storage device having a plurality of data blocks, the method comprising moving data to data blocks having higher erasure counts based on a constraint on static wear levelness that tightens over at least a portion of the lives of the plurality of data blocks.

Claims (49)

1. A method for managing wear levels in a storage device having a plurality of data blocks, the method comprising:

copying data from a data block having a first erasure count to a data block having a higher erasure count than the first erasure count;

erasing the data from the data block having the first erasure count; and

allocating the erased data block for a subsequent write operation, wherein the copying, erasing, and allocating is performed using a constraint on static wear levelness of the plurality of data blocks that is a function of one or more life parameters of the plurality of data blocks.

2. The method of claim 1 , wherein the one or more life parameters of the plurality of data blocks comprise one more of erasure counts of the plurality of data blocks, error rates of the plurality of data blocks, times for performing read operations, times for performing write operations, and times for performing erasure operations.

3. The method of claim 1 , further comprising:

determining a constraint parameter based at least in part on a maximum erasure count of the plurality of data blocks; and

determining a constraint threshold based at least in part on a minimum erasure count of the plurality of data blocks, wherein the copying, erasing, and allocating is performed in a manner that maintains the constraint parameter bounded by the constraint threshold.

4. The method of claim 3 , wherein the constraint threshold is defined by a substantially linear function of the minimum erasure count and the maximum erasure count.

5. The method of claim 3 , wherein the constraint threshold is defined by a substantially exponential function of the minimum erasure count and the maximum erasure count.

6. The method of claim 3 , further comprising repeating the copying, erasing and allocating, wherein the repeating comprises:

updating the minimum erasure count;

updating the maximum erasure count;

updating the constraint parameter based at least in part on the updated maximum erasure count; and

updating the constraint threshold based at least in part on the updated minimum erasure count.

7. A memory controller, comprising:

a memory device having a plurality of data blocks; and

a processor configured to:

copy data from a data block having a first erasure count to a data block having a higher erasure count than the first erasure count;

erase the data from the data block having the first erasure count; and

allocate the erased data block for a subsequent write operation, wherein the copying, erasing, and allocating is performed using a constraint on static wear levelness of the plurality of data blocks, the constraint being a function of one or more life parameters of the plurality of data blocks.

8. The device of claim 7 , wherein the one or more life parameters of the plurality of data blocks comprise one or both of erasure counts of the plurality of data blocks and error rates of the plurality of data blocks.

9. The device of claim 7 , wherein the processor is further configured to:

determine a constraint parameter based at least in part on a maximum erasure count of the plurality of data blocks; and

determine a constraint threshold based at least in part on a minimum erasure count of the plurality of data blocks, wherein the data is copied in a manner that maintains the constraint parameter bounded by the constraint threshold.

10. The device of claim 9 , wherein the processor is further configured to:

update the minimum erasure count;

update the maximum erasure count;

update the constraint parameter based at least in part on the updated maximum erasure count; and

update the constraint threshold based at least in part on the updated minimum erasure count.

11. The device of claim 7 , wherein the constraint on static wear levelness restricts the copying of the data until the maximum erasure count of the plurality of data blocks is at least about 25% of an end-of-life erasure count.

12. The device of claim 11 , wherein the constraint on static wear levelness restricts the copying of the data until the maximum erasure count of the plurality of data blocks is at least about 50% of the end-of-life erasure count.

13. A memory controller, comprising:

a memory device having a plurality of data blocks; and

a processor configured to:

determine an erasure count for each of the plurality of data blocks;

determine a constraint parameter using at least a maximum erasure count of the determined erasure counts;

determine a constraint threshold that defines a constraint on static wear levelness that varies over the lives of the plurality of data blocks; and

move data from a first data block having a first erasure count to a second data block having an erasure count higher than the first erasure count in a manner that maintains the parameter bounded by the constraint threshold.

14. The device of claim 13 , wherein the processor is configured to move the data from the first data block to the second data block by:

copying the data from the first data block to the second data block;

erasing the data from the first data block; and

allocating the first erased data block for a subsequent writing operation.

15. The device of claim 13 , wherein the constraint threshold is defined by at least one or both of 1) a substantially linear function of a minimum erasure count of the determined erasure counts and the maximum erasure count and 2) a substantially exponential function of the minimum erasure count and the maximum erasure count.

16. The device of claim 13 , wherein the constraint on static wear levelness restricts the copying of the data until a maximum erasure count of the plurality of data blocks is at least about 25% of an end-of-life erasure count of the plurality of data blocks.

17. The device of claim 16 , wherein the constraint on static wear levelness restricts the copying of the data until the maximum erasure count of the plurality of data blocks is at least about 50% of the end-of-life erasure count.

18. The device of claim 13 , wherein the constraint threshold is determined based at least in part on a minimum erasure count of the determined erasure counts.

19. The device of claim 13 , wherein the constraint threshold is further determined using an end-of-life erasure count of the plurality of data blocks.

20. The device of claim 13 , wherein the constraint threshold is further determined using at least one quantifiable property of the plurality of the data blocks.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2025
From: THE BANK OF NOVA SCOTIA
To: SEAGATE TECHNOLOGY US HOLDINGS, INC.; EVAULT, INC. (F/K/A I365 INC.); SEAGATE TECHNOLOGY LLC
Reel/Frame 070363/0903 →
RELEASE OF SECURITY INTEREST Recorded Jul 23, 2024
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: SEAGATE TECHNOLOGY LLC; EVAULT INC
Reel/Frame 068457/0076 →
RELEASE OF SECURITY INTEREST Recorded May 20, 2024
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: SEAGATE TECHNOLOGY LLC; EVAULT, INC. (F/K/A I365 INC.); SEAGATE TECHNOLOGY US HOLDINGS, INC.
Reel/Frame 067471/0955 →
SECURITY AGREEMENT Recorded Oct 15, 2012
From: SEAGATE TECHNOLOGY LLC; EVAULT, INC. (F/K/A I365 INC.); SEAGATE TECHNOLOGY US HOLDINGS, INC.
To: THE BANK OF NOVA SCOTIA, AS ADMINISTRATIVE AGENT
Reel/Frame 029127/0527 →
SECOND LIEN PATENT SECURITY AGREEMENT Recorded Oct 15, 2012
From: SEAGATE TECHNOLOGY LLC; EVAULT, INC. (F/K/A I365 INC.); SEAGATE TECHNOLOGY US HOLDINGS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 029253/0585 →
Continuity (2)
Continuation 12437040 · May 7, 2009
Related Publication 20120036312A1 · Feb 9, 2012