Semiconductor package and electronic component package

1. A semiconductor package assembled with flip chip bonding and sealed with resin, comprising:

an IC chip comprising:

an element arrangement region;

a pad array having at least four pads including a voltage input pad to supply an input voltage and a voltage output pad to which an output voltage is supplied, the voltage input pad and the voltage output pad being disposed at edges of the pad array;

a driver transistor disposed between the voltage input pad and the voltage output pad to receive the input voltage from the voltage input pad and output the output voltage to the voltage output pad, the driver transistor being disposed in contact with an edge of the element arrangement region; and

at least four leads on which the IC chip is mounted by the flip chip bonding to be formed in a lead array, the leads being disposed corresponding to the pads in the pad array,

the leads including a voltage input lead electrically connected to the voltage input pad and a voltage output lead electrically connected to the voltage output pad,

the voltage input lead and the voltage output lead being disposed at edges of the lead array.

2. The semiconductor package according to claim 1 , wherein the pads in the pad array and the leads in the lead array are arranged in an array consisting of at least three rows and three columns.

3. The semiconductor package according to claim 1 , wherein the IC chip further comprises at least two driver transistors and the voltage input pad is shared between any two adjacent two driver transistors.

4. The semiconductor package according to claim 1 , wherein the lead comprises a first face on which the IC chip is mounted and a second face opposite the first face, the first face has a surface area larger than the second face.

5. The semiconductor package according to claim 4 , wherein the semiconductor package comprises at least one pad whose layout position is different from a layout position of the second face of the corresponding lead.

6. An electronic component package comprising:

a printed circuit board having at least four wiring patterns; and

a semiconductor package mounted on the printed circuit board by flip chip bonding and sealed with resin,

the semiconductor package comprising:

an IC chip comprising:

an element arrangement region;

a pad array having at least four pads, the pads including a voltage input pad to supply an input voltage and a voltage output pad to which an output voltage is supplied, the voltage input pad and the voltage output pad being disposed at edges of the pad array; and

a driver transistor disposed between the voltage input pad and the voltage output pad to receive the input voltage from the voltage input pad and output the output voltage to the voltage output pad, the driver transistor being disposed in contact with an edge of the element arrangement region; and

at least four leads on which the IC chip is mounted by the flip chip bonding, disposed corresponding to the pads in the pad array, formed in a lead array, the leads including a voltage input lead electrically connected to the voltage input pad and a voltage output lead electrically connected to the voltage output pad, the voltage input lead and the voltage output lead being disposed at edges of the lead array.

7. The electronic component package according to claim 6 , wherein the wiring patterns have a voltage input wiring pattern electrically connected to the voltage input lead and a voltage output wiring pattern electrically connected to the voltage output lead, and the voltage input wiring pattern and the voltage output wiring pattern have line widths that are wider than line widths of other wiring patterns.