Semiconductor device with pads of enhanced moisture blocking ability
View Patent ↗A semiconductor device is provided having a pad with an improved moisture blocking ability. The semiconductor device has: a circuit portion including a plurality of semiconductor elements formed on a semiconductor substrate; lamination of insulator covering the circuit portion, including a passivation film as an uppermost layer having openings; ferro-electric capacitors formed in the lamination of insulator; wiring structure formed in the lamination of insulator and connected to the semiconductor elements and the ferro-electric capacitors; pad electrodes connected to the wiring structure, formed in the lamination of insulator and exposed in the openings of the passivation film; a conductive pad protection film, including a Pd film, covering each pad electrode via the opening of the passivation film, and extending on the passivation film; and stud bump or bonding wire connected to the pad electrode via the conductive pad protection film.
1. A method for manufacturing a semiconductor device comprising steps of:
(a) forming a plurality of semiconductor elements in chip area of a semiconductor substrate;
(b) forming a lower interlayer insulating film covering said plurality of semiconductor elements on said semiconductor substrate;
(c) forming a ferro-electric capacitor on said lower interlayer insulating film;
(d) forming a multilayer interlayer insulating film covering said ferro-electric capacitor on said lower interlayer insulating film;
(e) forming a wiring structure connected to said semiconductor elements and said ferro-electric capacitor and disposed in or on a surface of said lower interlayer insulating film and said multilayer interlayer insulating film;
(f) forming pad electrode structure disposed in and on a surface of said multilayer insulating film and connected to said wiring structure;
(g) forming a passivation film on said multilayer insulating film, said passivation film having an opening exposing said pad electrode structure;
(h) performing an inspection by abutting a needle on said pad electrode structure; and
(i) forming a conductive pad protection film including a Pd film, covering said pad electrode structure after inspection, via said opening of said passivation film, and extending on said passivation film.
2. The method for manufacturing a semiconductor device according to claim 1 , wherein said step (i) comprises steps of:
(i-1) forming a Ti film; and
(i-2) forming a Pd film on said Ti film.
3. The method for manufacturing a semiconductor device according to claim 2 , wherein said step (h) makes flaw in said pad electrode structure and said step (i) covers said flaw with said conductive pad protection film.
4. The method for manufacturing a semiconductor device according to claim 2 , wherein said step (i) includes forming a TiN or Ti—Al—N film between said Ti film and said Pd film.
5. The method for manufacturing a semiconductor device according to claim 1 , further comprising step of:
(j) patterning said conductive pad protection film.
6. The method for manufacturing a semiconductor device according to claim 1 , further comprising step of:
(k) connecting a stud bump or a bonding wire to said conductive pad protection film.
7. The method for manufacturing a semiconductor device according to claim 6 , wherein said pad electrode structure has an uppermost surface of aluminum or aluminum alloy.
8. The method for manufacturing a semiconductor device according to claim 1 , further comprising:
(1) dividing said conductive pad protection film into a portion covering said pad electrode structure and a portion covering an area above said ferro-electric capacitor.
9. A method for manufacturing a semiconductor device comprising steps of:
(a) forming a plurality of semiconductor elements in chip area of a semiconductor substrate;
(b) forming a lower interlayer insulating film covering said plurality of semiconductor elements on said semiconductor substrate;
(c) forming a ferro-electric capacitor on said lower interlayer insulating film;
(d) forming a multilayer interlayer insulating film covering said ferro-electric capacitor on said lower interlayer insulating film;
(e) forming a wiring structure connected to said semiconductor elements and said ferro-electric capacitor and disposed in or on a surface of said lower interlayer insulating film and said multilayer interlayer insulating film;
(f) forming a pad electrode structure disposed in and on a surface of said multilayer insulating film and connected to said wiring structure;
(g) forming a passivation film on said multilayer insulating film, said passivation film having an opening exposing said pad electrode structure;
(h) performing an inspection by abutting a needle on said pad electrode structure;
(i) forming a conductive pad protection film on said passivation film, said conductive pad protection film including a Pd film and covering said pad electrode structure after inspection via said opening of said passivation film; and
(j) dividing said conductive pad protection film into a portion covering said pad electrode structure and a portion covering an area above said ferro-electric capacitor.