Interleaving codeword portions between multiple planes and/or dies of a flash memory device
View Patent ↗A system, a method and a non-transitory computer readable medium are disclosed. The non-transitory computer readable medium may store instructions for: (I) interleaving at least two portions of a first codeword of a group of codewords between at least two flash memory planes while violating at least one ordering rule out of (a) an even odd ordering rule, (b) a programming type ordering rule, and (c) a codeword portions ordering rule; and (II) interleaving different portions of other codewords of the group of codewords between multiple flash memory planes while maintaining the even odd ordering rule, the programming type ordering rule and the codeword portions ordering rule. The at least two portions may be programmed to rows in different flash memory blocks, and the flash memory planes may belong to the same or multiple flash memory dies. The programming type ordering may define different decoupling sequence steps with sizes set for different programming types according to sensitivity to noise.
1. A method for programming a group of codewords, wherein each codeword comprises multiple codeword portions, the method comprising:
interleaving at least two portions of a first codeword of a group of codewords between at least two flash memory planes while violating at least one ordering rule out of (a) an even odd ordering rule, (b) a programming type ordering rule, and (c) a codeword portions ordering rule;
interleaving different portions of other codewords of the group of codewords between multiple flash memory planes while maintaining the even odd ordering rule, the programming type ordering rule and the codeword portions ordering rule;
wherein the multiple flash memory planes comprise the at least two flash memory planes;
wherein the codeword portions ordering rule determines an order of programming of different portions of a same codeword;
wherein the even odd ordering rule determines an order of programming codeword portions to even pages and odd pages of the flash memory planes;
wherein the programming type ordering rule determines an order of programming types that differ from each other by significance; and
wherein the programming type ordering rule defines at least two different decoupling sequence steps for at least two different programming types.
2. The method according to claim 1 , further comprising violating the at least one ordering rule for each type of codeword of different types of codewords.
3. The method according to claim 1 , wherein the interleaving of the at least two portions comprises programming the at least two portions to rows of the at least two flash memory planes, the rows having a same row number.
4. The method according to claim 1 , wherein the interleaving of the at least two portions comprises programming the at least two portions to rows of the at least two flash memory planes, the rows, the rows having different row numbers.
5. The method according to claim 1 , further comprising programming the group of codewords to rows that form a flash memory block per each flash memory plane; wherein the interleaving of the at least two portions comprises programming the at least two portions to a row at a start of a flash memory block and to another row at an end of another flash memory block.
6. The method according to claim 1 , wherein the multiple flash memory planes belong to a same flash memory die.
7. The method according to claim 1 , wherein the multiple flash memory planes belong to multiple flash memory dies.
8. The method according to claim 1 , wherein the interleaving of the at least two portions comprises violating only the even odd ordering rule.
9. The method according to claim 1 , wherein the interleaving of the at least two portions comprises violating only the programming type ordering rule.
10. The method according to claim 1 , wherein the interleaving of the at least two portions comprises violating only the codeword portions ordering rule.
11. The method according to claim 1 , further comprising interleaving each codeword between at least four flash memory planes.
12. The method according to claim 1 further comprising compensating for an expected outcome of the violating of the at least one ordering rule during the interleaving of the at least two portions of the first codeword.
13. The method according to claim 1 , wherein sizes of the different decoupling sequence steps are set according to sensitivity of the at least two different programming types to noise.
14. A method for programming a group of codewords, wherein each codeword comprises multiple codeword portions, the method comprising: interleaving at least two portions of a first codeword of a group of codewords between at least two flash memory planes while violating at least one ordering rule out of (a) an even odd ordering rule, (b) a programming type ordering rule, and (c) a codeword portions ordering rule; interleaving different portions of other codewords of the group of codewords between multiple flash memory planes while maintaining the even odd ordering rule, the programming type ordering rule and the codeword portions ordering rule; determining an order of programming of the different portions of the other codewords of the group of codewords by: determining a logical programming order based upon the even odd ordering rule and the programming type ordering rule; and applying a logical to physical mapping on the logical programming order to provide a physical programming order that is upheld during the interleaving of the different portions of the other codewords of the group of codewords; wherein the multiple flash memory planes comprise the at least two flash memory planes; wherein the codeword portions ordering rule determines an order of programming of different portions of a same codeword; wherein the even odd ordering rule determines an order of programming codeword portions to even pages and odd pages of the flash memory planes; and wherein the programming type ordering rule determines an order of programming types that differ from each other by significance.
15. A system, comprising:
at least one flash memory die that comprises multiple flash memory planes; and
a memory controller arranged to:
interleave at least two portions of a first codeword of a group of codewords between at least two flash memory planes while violating at least one ordering rule out of (a) an even odd ordering rule, (b) a programming type ordering rule, and (c) a codeword portions ordering rule; and
interleave different portions of other codewords of the group of codewords between the multiple flash memory planes while maintaining the even odd ordering rule, the programming type ordering rule and the codeword portions ordering rule;
wherein the multiple flash memory planes comprise the at least two flash memory planes;
wherein the codeword portions ordering rule determines an order of programming of different portions of a same codeword;
wherein the even odd ordering rule determines an order of program codeword portions to even pages and odd pages of the flash memory planes;
wherein the programming type ordering rule determines an order of program types that differ from each other by significance; and
wherein the programming type ordering rule defines at least two different decoupling sequence steps for at least two different programming types.
16. The system according to claim 15 wherein the memory controller is arranged to violate the at least one ordering rule for each type of codeword of the different types of codewords.
17. The system according to claim 15 wherein the memory controller is arranged to program the at least two portions to rows having a same row number.
18. The system according to claim 15 wherein the memory controller is arranged to program the at least two portions to rows having different row numbers.
19. The system according to claim 15 , wherein the memory controller is arranged to program the group of codewords to rows that define a flash memory block per each flash memory plane; and wherein the memory controller is arranged to program the at least two portions to a row at a start of a flash memory block and to another row at an end of another flash memory block.
20. The system according to claim 15 , wherein the multiple flash memory planes belong to a same flash memory die.
21. The system according to claim 15 , wherein the multiple flash memory planes belong to multiple flash memory dies.
22. The system according to claim 15 wherein the memory controller is arranged to violate only the even odd ordering rule.
23. The system according to claim 15 wherein the memory controller is arranged to violate only the programming type ordering rule.
24. The system according to claim 15 wherein the memory controller is arranged to violate only the codeword portions ordering rule.
25. The system according to claim 15 wherein the memory controller is arranged to interleave each codeword between at least four flash memory planes.
26. The system according to claim 15 , further comprising an encoder that is arranged to at least partially compensate for an expected outcome of violating of the at least one ordering rule during the interleaving of the at least two portions of the first codeword.
27. The system according to claim 15 , wherein sizes of the different decoupling sequence steps are set according to sensitivity of the different types of programming to noise.
28. A system, comprising: at least one flash memory die that comprises multiple flash memory planes; and a memory controller arranged to: interleave at least two portions of a first codeword of a group of codewords between at least two flash memory planes while violating at least one ordering rule out of (a) an even odd ordering rule, (b) a programming type ordering rule, and (c) a codeword portions ordering rule; and interleave different portions of other codewords of the group of codewords between the multiple flash memory planes while maintaining the even odd ordering rule, the programming type ordering rule and the codeword portions ordering rule; wherein the multiple flash memory planes comprise the at least two flash memory planes; wherein the codeword portions ordering rule determines an order of programming of different portions of a same codeword; wherein the even odd ordering rule determines an order of program codeword portions to even pages and odd pages of the flash memory planes; wherein the programming type ordering rule determines an order of program types that differ from each other by significance; wherein the memory controller is further arranged to determine a logical program order based upon the even odd ordering rule and the program type ordering rule; and apply a logical to physical mapping on the logical program order to provide a physical programming order that is upheld during the interleaving of the different portions of the other codewords of the group of codewords.
29. A non-transitory computer readable medium, wherein the non-transitory computer readable medium storing instructions for:
interleaving at least two portions of a first codeword of a group of codewords between at least two flash memory planes while violating at least one ordering rule out of (a) an even odd ordering rule, (b) a programming type ordering rule, and (c) a codeword portions ordering rule;
interleaving different portions of other codewords of the group of codewords between multiple flash memory planes while maintaining the even odd ordering rule, the programming type ordering rule and the codeword portions ordering rule;
wherein the multiple flash memory planes comprise the at least two memory flash memory planes;
wherein the codeword portions ordering rule determines an order of programming of different portions of a same codeword;
wherein the even odd ordering rule determines an order of programming codeword portions to even pages and odd pages of the flash memory planes;
wherein the programming type ordering rule determines an order of programming types that differ from each other by significance; and
wherein the programming type ordering rule defines at least two different decoupling sequence steps for at least two different programming types.
30. The non-transitory computer readable medium according to claim 29 , wherein the non-transitory computer readable medium storing instructions for violating the at least one ordering rule for each type of codeword of different types of codewords.
31. The non-transitory computer readable medium according to claim 29 , wherein the non-transitory computer readable medium storing instructions for programming the at least two portions to rows of the at least two flash memory planes, the rows having a same row number.
32. The non-transitory computer readable medium according to claim 29 , wherein the non-transitory computer readable medium storing instructions for programming the at least two portions to rows of the at least two flash memory planes, the rows having different row numbers.
33. The non-transitory computer readable medium according to claim 29 , wherein the non-transitory computer readable medium storing instructions for programming the group of codewords to rows of the at least two flash memory planes, the rows form a flash memory block per each flash memory plane; wherein the interleaving of the at least two portions comprises programming the at least two portions to a row at a start of a flash memory block and to another row at an end of another flash memory block.
34. The non-transitory computer readable medium according to claim 29 , wherein the multiple flash memory planes belong to a same flash memory die.
35. The non-transitory computer readable medium according to claim 29 , wherein the multiple flash memory planes belong to multiple flash memory dies.
36. The non-transitory computer readable medium according to claim 29 , wherein the non-transitory computer readable medium storing instructions for violating only the even odd ordering rule.
37. The non-transitory computer readable medium according to claim 29 , wherein the non-transitory computer readable medium storing instructions for violating only the programming type ordering rule.
38. The non-transitory computer readable medium according to claim 29 , wherein the non-transitory computer readable medium storing instructions for violating only the codeword portions ordering rule.
39. The non-transitory computer readable medium according to claim 29 wherein the non-transitory computer readable medium storing instructions for interleaving each codeword between at least four flash memory planes.
40. The non-transitory computer readable medium according to claim 29 , wherein the non-transitory computer readable medium storing instructions for at least partially compensating for an expected outcome of the violating of the at least one ordering rule during the interleaving of the at least two portions of the first codeword.
41. The non-transitory computer readable medium according to claim 29 , wherein sizes of the different decoupling sequence steps are set according to sensitivity of the at least two different programming types to noise.
42. A non-transitory computer readable medium, wherein the non-transitory computer readable medium storing instructions for: interleaving at least two portions of a first codeword of a group of codewords between at least two flash memory planes while violating at least one ordering rule out of (a) an even odd ordering rule, (b) a programming type ordering rule, and (c) a codeword portions ordering rule; interleaving different portions of other codewords of the group of codewords between multiple flash memory planes while maintaining the even odd ordering rule, the programming type ordering rule and the codeword portions ordering rule; determining a logical programming order based upon the even odd ordering rule and the programming type ordering rule; and applying a logical to physical mapping on the logical programming order to provide a physical programming order that is upheld during the programming of the interleaving of the different portions of the other codewords of the group of codewords; wherein the multiple flash memory planes comprise the at least two flash memory planes; wherein the codeword portions ordering rule determines an order of programming of different portions of a same codeword; wherein the even odd ordering rule determines an order of programming codeword portions to even pages and odd pages of the flash memory planes; wherein the programming type ordering rule determines an order of programming types that differ from each other by significance.