Semiconductor device with inverted trapezoidal cross sectional profile in surface areas of substrate
View Patent ↗A semiconductor device fabrication method includes the steps of (a) forming a dielectric film on a semiconductor substrate; (b) etching the dielectric film by a dry process; and (c) supplying thermally decomposed atomic hydrogen onto the semiconductor substrate under a prescribed temperature condition, to remove a damaged layer produced in the semiconductor substrate due to the dry process.
1. A semiconductor device comprising:
a semiconductor substrate;
a gate electrode formed on the semiconductor substrate via a dielectric film;
a sidewall formed on a side surface of the gate electrode; and
an impurity diffused region formed in the semiconductor substrate on both sides of the gate electrode;
wherein the bottom of the sidewall has a first inverted trapezoidal cross-sectional profile, and a surface area of the impurity diffused region extending outside the sidewall has a second inverted trapezoidal cross-sectional profile; and
the first inverted trapezoidal cross-sectional profile and the second inverted trapezoidal cross-sectional profile are located lower than a surface of the semiconductor substrate under the dielectric film.
2. A semiconductor device comprising:
a semiconductor substrate;
a gate electrode formed on a first surface of the semiconductor substrate via a dielectric film;
a sidewall formed on a side surface of the gate electrode; and
an impurity diffused region formed in the semiconductor substrate on both sides of the gate electrode, wherein the impurity diffused region includes a second surface which is located lower than the first surface and a third surface which is located between first surface and second surface, a first inner angle of the semiconductor substrate between the first surface and the third surface is an obtuse angle, and a first outer angle of the semiconductor substrate between the second surface and the third surface is an obtuse angle,
wherein the impurity diffused region includes a fourth surface which is located lower than the second surface and a fifth surface which is located between the fourth surface and the second surface;
a second inner angle of the semiconductor substrate between the second surface and the fifth surface is an obtuse angle; and
a second outer angle of the semiconductor substrate between the fifth surface and the fourth surface is an obtuse angle.
3. The semiconductor device of claim 2 , wherein the sidewall is located on the second surface and the third surface.
4. The semiconductor device of claim 2 , further comprising:
a contact plug formed on the second surface and the third surface.