Spin-transfer torque memory non-destructive self-reference read method
View Patent ↗A method of self-reference reading a spin-transfer torque memory unit includes applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage. The magnetic tunnel junction data cell has a first resistance state. Then the method includes applying a second read current thorough the magnetic tunnel junction data cell having the first resistance state. The first read current is less than the second read current. Then the first bit line read voltage is compared with the second bit line read voltage to determine whether the first resistance state of the magnetic tunnel junction data cell was a high resistance state or low resistance state.
1. A method of non-destructive self-reference reading a spin-transfer torque memory unit, comprising:
applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage, the magnetic tunnel junction data cell having a first resistance state;
applying a second read current thorough the magnetic tunnel junction data cell having the first resistance state and forming a second bit line read voltage, the first read current being less than the second read current; and
comparing the first bit line read voltage with the second bit line read voltage to determine whether the first resistance state of the magnetic tunnel junction data cell was a high resistance state or low resistance state.
2. A method according to claim 1 , wherein the comparing step comprises comparing the first bit line read voltage with the second bit line read voltage and if the first bit line read voltage is substantially the same as or less than the second bit line read voltage, then the first resistance state is determined to be a low resistance state.
3. A method according to claim 1 , wherein the comparing step comprises comparing the first bit line read voltage with the second bit line read voltage and if the first bit line read voltage is greater than or not substantially the same as the second bit line read voltage, then the first resistance state is determined to be a high resistance state.
4. A method according to claim 1 , wherein the comparing step comprises comparing the first bit line read voltage with the second bit line read voltage and if the first bit line read voltage is 25% greater than the second bit line read voltage then the first resistance state is determined to be a high resistance state.
5. A method according to claim 1 , wherein the comparing step comprises comparing the first bit line read voltage with the second bit line read voltage and if the first bit line read voltage is 50% greater than the second bit line read voltage then the first resistance state is determined to be a high resistance state.
6. A method according to claim 1 , wherein the comparing step comprises comparing the first bit line read voltage with the second bit line read voltage and if the first bit line read voltage is 100% greater than the second bit line read voltage then the first resistance state is determined to be a high resistance state.
7. A method according to claim 1 , wherein the first read current is 40% to 60% of the second read current.
8. A method according to claim 1 , wherein the second read current forms the second bit line read voltage being an average value of a low resistance state voltage value and a high resistance state voltage value of the magnetic tunnel junction data cell.
9. A method according to claim 1 , wherein the second read current is a maximum read current.
10. A method according to claim 1 , wherein the first read current is 40% to 50% of the second read current.
11. A method of self-reference reading a spin-transfer torque memory unit, comprising:
applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage, the magnetic tunnel junction data cell having a first resistance state;
applying a second read current thorough the magnetic tunnel junction data cell having the first resistance state and forming a second bit line read voltage, the first read current being less than the second read current;
comparing the first bit line read voltage with the second bit line read voltage, and if the first bit line read voltage is substantially the same as or less than the second bit line read voltage, then the first resistance state is determined to be a low resistance state, and if the first bit line read voltage is greater than the second bit line read voltage, then the first resistance state is determined to be a high resistance state.
12. A method according to claim 11 , wherein the comparing step comprises comparing the first bit line read voltage with the second bit line read voltage and if the first bit line read voltage is 10% greater than the second bit line read voltage then the first resistance state is determined to be a high resistance state.
13. A method according to claim 11 , wherein the comparing step comprises comparing the first bit line read voltage with the second bit line read voltage and if the first bit line read voltage is 25% greater than the second bit line read voltage then the first resistance state is determined to be a high resistance state.
14. A method according to claim 11 , wherein the comparing step comprises comparing the first bit line read voltage with the second bit line read voltage and if the first bit line read voltage is 50% greater than the second bit line read voltage then the first resistance state is determined to be a high resistance state.
15. A method according to claim 11 , wherein the comparing step comprises comparing the first bit line read voltage with the second bit line read voltage and if the first bit line read voltage is 100% greater than the second bit line read voltage then the first resistance state is determined to be a high resistance state.
16. A method according to claim 11 , wherein the second read current is a maximum read current.
17. A method according to claim 11 , wherein the first read current is 40% to 60% of the second read current.
18. A method according to claim 11 , wherein the first read current is 40% to 50% of the second read current.