IP Library Granted Patent US 8,551,849
Granted Patent B2
US 8,551,849 · App. 13/366,572 · Granted Oct 8, 2013

Semiconductor device and method of manufacturing the same

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,551,849
App. No.
13/366,572
Granted
Oct 8, 2013
Kind
B2
Abstract

Aimed at providing a highly reliable semiconductor device appropriately increased in stress at the channel region so as to improve carrier injection rate, thereby dramatically improved in transistor characteristics, and made adaptable also to recent narrower channel width, and a method of manufacturing the same, and a method of manufacturing the same, a first sidewall composed of a stress film having expandability is formed on the side faces of a gate electrode, a second sidewall composed of a film having smaller stress is formed on the first sidewall, and a semiconductor, which is a SiC layer for example, is formed as being positioned apart from the first sidewall while placing the second sidewall in between.

Claims (22)

1. A method of manufacturing a semiconductor device, comprising:

forming a gate electrode over a semiconductor substrate while placing a gate insulating film in between;

forming a first sidewall over the side faces of the gate electrode;

forming a recess by etching the semiconductor substrate using the gate electrode and the first sidewall as a mask;

forming a semiconductor layer in the recess, the semiconductor layer including SiC, and a C content of the semiconductor layer being 1% to 3%,

removing the first sidewall after forming the semiconductor layer,

forming a second sidewall including a stress film over the side face of the gate electrode after removing the first sidewall, the second sidewall is located apart from the semiconductor layer, and

forming a third sidewall on the second sidewall.

2. The method of manufacturing a semiconductor device according to claim 1 , wherein the semiconductor layer is formed as being positioned apart from the first sidewall while placing the second sidewall in between.

3. The method of manufacturing a semiconductor device according to claim 1 wherein the stress film has expandability.

4. The method of manufacturing a semiconductor device according to claim 1 , wherein the stress film has an absolute intrinsic stress value of 2.5 GPa or larger and 4.0 GPa or smaller.

5. The method of manufacturing a semiconductor device according to claim 1 , wherein the second sidewall includes a film having stress smaller than that of the first sidewall.

6. A method of manufacturing a semiconductor device, comprising:

forming a gate electrode over a semiconductor substrate while placing a gate insulating film in between;

forming a first sidewall over the side faces of the gate electrode;

forming a recess by etching the semiconductor substrate using the gate electrode and the first sidewall as a mask;

forming a semiconductor layer in the recess;

removing the first sidewall;

forming a second sidewall including stress film over the side faces of the gate electrode; and

forming a third sidewall on the second sidewall,

wherein the semiconductor layer is positioned apart from the the second sidewall while placing the third sidewall in between.

7. The method of manufacturing a semiconductor device according to claim 6 , wherein the third sidewall includes a film having stress smaller than that of the second sidewall.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2025
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 073964/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 27, 2024
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 069454/0333 →
MERGER Recorded May 24, 2023
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU LIMITED
Reel/Frame 064221/0545 →
CHANGE OF NAME AND CHANGE OF ADDRESS Recorded Jul 16, 2020
From: AIZU FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 053481/0962 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2020
From: FUJITSU SEMICONDUCTOR LIMITED
To: AIZU FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 053209/0468 →
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →