IP Library Granted Patent US 8,847,400
Granted Patent B2
US 8,847,400 · App. 13/408,318 · Granted Sep 30, 2014

Semiconductor device, method for manufacturing the same, and data processing device

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Quick Facts
Patent No.
US 8,847,400
App. No.
13/408,318
Granted
Sep 30, 2014
Kind
B2
Abstract

A semiconductor device comprises a material layer including a first surface and a trench with an opening in the first surface. The trench is formed in the material layer. The trench comprises a tapered portion and a vertical portion. The tapered portion is in contact with the opening and comprises a scalloping-forming trench. The vertical portion has a substantially vertical sidewall. A width of the scalloping-forming trench is larger than a width of the vertical portion.

Claims (43)

1. A semiconductor device, comprising:

a material layer including a first surface and a trench with an opening in the first surface, a tapered portion, and a vertical portion,

wherein the tapered portion is in contact with the opening,

wherein the vertical portion has a substantially vertical sidewall, and

wherein at least one of the tapered portion and the vertical portion comprises two or more scalloping-forming trenches.

2. The semiconductor device according to claim 1 , wherein the tapered portion comprises the two or more scalloping-forming trenches, and the width of the scalloping-forming trench close to the opening is larger than the width of the scalloping-forming trench far from the opening.

3. The semiconductor device according to claim 1 , wherein the vertical portion comprises the two or more scalloping-forming trenches, the scalloping-forming trenches having substantially the same widths.

4. The semiconductor device according to claim 1 , wherein an edge of a scalloping-forming sidewall of each of the two or more scalloping-forming trenches has a smooth surface without an acute peak.

5. The semiconductor device according to claim 1 , wherein the two or more scalloping-forming trenches penetrate into a semiconductor substrate.

6. The semiconductor device according to claim 1 , wherein the two or more scalloping-forming trenches are filled with a conductive material.

7. The semiconductor device according to claim 1 , wherein the two or more scalloping-forming trenches are filled with an insulation material.

8. The semiconductor device according to claim 1 , wherein the two or more scalloping-forming trenches surround a through silicon via penetrating through a semiconductor substrate, and form an insulation ring.

9. The semiconductor device according to claim 8 , wherein the semiconductor device comprises a plurality of the semiconductor substrates, each of the semiconductor substrates including the through silicon via and the insulation ring, and

the plurality of the semiconductor substrates are stacked, and

the plurality of the semiconductor substrates are electrically connected with each other via the through silicon vias.

10. A method for manufacturing a semiconductor device, comprising:

forming a tapered portion from a first surface of a material layer inward in a thickness direction thereof; and

forming a vertical portion having a substantially vertical sidewall under the tapered portion in the material layer,

wherein at least one of the tapered portion and the vertical portion comprises two or more scalloping-forming trenches.

11. The method for manufacturing a semiconductor device according to claim 10 , wherein the tapered portion comprises the two or more scalloping-forming trenches, and the width of the scalloping-forming trench close to the first surface is larger than the width of the scalloping-forming trench far from the first surface.

12. The method for manufacturing a semiconductor device according to claim 10 , wherein the vertical portion comprises the two or more scalloping-forming trenches, the scalloping-forming trenches having substantially the same widths.

13. The method for manufacturing a semiconductor device according to claim 10 , wherein one of the two or more scalloping-forming trenches is formed by performing one cycle, the cycle including following steps (1) to (3):

(1) isotropically etching the exposed material layer to form a second of the two or more scalloping-forming trenches;

(2) forming a protective film on an inner wall of the second trench; and

(3) removing the protective film formed on a bottom surface of the inner wall of the second trench.

14. The method for manufacturing a semiconductor device according to claim 13 , further comprising performing a plurality of said one cycle wherein in forming the tapered portion, an etching time of the step (1) is shortened every one cycle.

15. The method for manufacturing a semiconductor device according to claim 13 , wherein the material layer is a semiconductor substrate made of silicon, and in the step (1), SF 6 gas is used.

16. The method for manufacturing a semiconductor device according to claim 13 , wherein the protective film contains a polymer including carbon as a main component, and in the step (2), C 4 F 8 gas is used.

17. The method for manufacturing a semiconductor device according to claim 13 , wherein the method further comprises, after forming the tapered portion and the vertical portion:

removing the protective film on the inner wall of the second trench; and

rounding an edge of a scallop-forming sidewall.

18. The method for manufacturing a semiconductor device according to claim 17 , wherein in rounding the edge of the scallop-forming sidewall, an isotropic etching is performed.

19. The method for manufacturing a semiconductor device according to claim 17 , wherein the rounding the edge of the scallop-forming sidewall comprises:

forming a second material layer; and

etching the edge of the scallop-forming sidewall.

20. A data processing device, comprising:

a processor;

a DRAM memory module; and

a system bus connecting the processor with the DRAM memory module;

wherein a semiconductor device included in the data processing device comprises a material layer including a first surface and a trench with an opening in the first surface, a tapered portion, and a vertical portion,

wherein the tapered portion is in contact with the opening and comprises a scalloping-forming trench; and

the vertical portion has a substantially vertical sidewall, and

a width of the scalloping-forming trench of the tapered portion is larger than a width of the vertical portion.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2018
From: LONGITUDE SEMICONDUCTOR S.A.R.L.
To: LONGITUDE LICENSING LIMITED
Reel/Frame 046865/0667 →
CHANGE OF NAME Recorded Aug 24, 2016
From: PS5 LUXCO S.A.R.L.
To: LONGITUDE SEMICONDUCTOR S.A.R.L.
Reel/Frame 039793/0880 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2016
From: PS4 LUXCO S.A.R.L.
To: PS5 LUXCO S.A.R.L.
Reel/Frame 039818/0506 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2014
From: ELPIDA MEMORY, INC.
To: PS4 LUXCO S.A.R.L.
Reel/Frame 032898/0319 →
SECURITY AGREEMENT Recorded Jul 29, 2013
From: PS4 LUXCO S.A.R.L.
To: ELPIDA MEMORY INC.
Reel/Frame 032414/0261 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 23, 2012
From: FUJITA, OSAMU; TOGASHI, YUKI
To: ELPIDA MEMORY, INC.
Reel/Frame 028086/0688 →