IP Library Granted Patent US 8,658,529
Granted Patent B2
US 8,658,529 · App. 13/455,254 · Granted Feb 25, 2014

Method for manufacturing semiconductor device

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Quick Facts
Patent No.
US 8,658,529
App. No.
13/455,254
Granted
Feb 25, 2014
Kind
B2
Abstract

An oxide film is formed on an inner surface of a via hole in which a through electrode is to be formed, and thereafter a Cu film is embedded in the via hole. When an excess Cu film formed on a first interlayer insulating film is removed by a CMP method, the oxide film is also polished and reduced in thickness. Using the oxide film reduced in thickness as a hard mask, a wiring trench is formed in the first interlayer insulating film. At this time, the oxide film is further reduced in thickness. After a conductive material is embedded in the wiring trench, an excess conductive material is removed by polishing. At this time, the remaining oxide film is removed entirely by the polishing.

Claims (38)

1. A method for manufacturing a semiconductor device, comprising:

forming a semiconductor element over one surface of a substrate;

forming a first insulating film over the semiconductor element;

forming a hole penetrating the first insulating film and reaching into the substrate;

forming a second insulating film over the first insulating film and on an inner surface of the hole;

embedding a first conductive material in the hole;

removing the first conductive material and a part of the second insulating film over the first insulating film by polishing;

forming a pattern in the second insulating film and the first insulating film by etching the second insulating film and the first insulating film;

embedding a second conductive material in the pattern;

removing the second conductive film and the remaining second insulating film over the first insulating film by polishing to expose the first insulating film; and

reducing a thickness of the substrate from the other surface to expose the first conductive material embedded in the hole.

2. The method for manufacturing a semiconductor device according to claim 1 , wherein the forming the pattern comprises reducing a thickness of the second insulating film by etching.

3. The method for manufacturing a semiconductor device according to claim 2 , further comprising, between the forming the semiconductor element and forming the first insulating film, forming a film in which a plug electrically connected to the semiconductor element is embedded, wherein

the first insulating film is forming over the film in which the plug is embedded, and

the embedding the second conductive material comprises forming a wire electrically connected to the plug.

4. The method for manufacturing a semiconductor device according to claim 3 , wherein the hole is formed so as to penetrate the film in which the plug is embedded.

5. The method for manufacturing a semiconductor device according to claim 4 , further comprising:

forming a third insulating film over the first insulating film and the second conductive material; and

forming a wire electrically connected to the second conductive material in the third insulating film.

6. The method for manufacturing a semiconductor device according to claim 3 , further comprising:

forming a third insulating film over the first insulating film and the second conductive material; and

forming a wire electrically connected to the second conductive material in the third insulating film.

7. The method for manufacturing a semiconductor device according to claim 2 , wherein the embedding the second conductive material comprises forming a plug electrically connected to the semiconductor element.

8. The method for manufacturing a semiconductor device according to claim 2 , further comprising, between removing the second conductive film and the remaining second insulating film and reducing the thickness of the substrate, forming a plurality of wiring layers over the first insulating film.

9. The method for manufacturing a semiconductor device according to claim 8 , wherein the first conductive material and the second conductive material are in contact with each other via at least a part of the plurality of wiring layers.

10. The method for manufacturing a semiconductor device according to claim 1 , further comprising, between the forming the semiconductor element and forming the first insulating film, forming a film in which a plug electrically connected to the semiconductor element is embedded, wherein

the first insulating film is formed over the film in which the plug is embedded, and

the embedding the second conductive material comprises forming a wire electrically connected to the plug.

11. The method for manufacturing a semiconductor device according to claim 10 , wherein the hole is formed so as to penetrate the film in which the plug is embedded.

12. The method for manufacturing a semiconductor device according to claim 11 , further comprising:

forming a third insulating film over the first insulating film and the second conductive material; and

forming a wire electrically connected to the second conductive material in the third insulating film.

13. The method for manufacturing a semiconductor device according to claim 10 , further comprising:

forming a third insulating film over the first insulating film and the second conductive material; and

forming a wire electrically connected to the second conductive material in the third insulating film.

14. The method for manufacturing a semiconductor device according to claim 1 , wherein the embedding the second conductive material comprises forming a plug electrically connected to the semiconductor element.

15. The method for manufacturing a semiconductor device according to claim 1 , further comprising, between removing the second conductive film and the remaining second insulating film and reducing the thickness of the substrate, forming a plurality of wiring layers over the first insulating film.

16. The method for manufacturing a semiconductor device according to claim 15 , wherein the first conductive material and the second conductive material are in contact with each other via at least a part of the plurality of wiring layers.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2025
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 073964/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 27, 2024
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 069454/0333 →
MERGER Recorded May 24, 2023
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU LIMITED
Reel/Frame 064221/0545 →
CHANGE OF NAME AND CHANGE OF ADDRESS Recorded Jul 16, 2020
From: AIZU FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 053481/0962 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2020
From: FUJITSU SEMICONDUCTOR LIMITED
To: AIZU FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 053209/0468 →
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2012
From: IDANI, NAOKI
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 028102/0315 →