IP Library Granted Patent US 8,736,996
Granted Patent B2
US 8,736,996 · App. 13/475,787 · Granted May 27, 2014

Implementing channel signal processing assist with ECS contact detection

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Quick Facts
Patent No.
US 8,736,996
App. No.
13/475,787
Granted
May 27, 2014
Kind
B2
Abstract

A method, apparatus, and system for implementing channel signal processing assist with an embedded contact sensor (ECS) in hard disk drives. An ECS signal is captured during write and idle operation of the hard disk drive. A read channel monitors changes in the ECS signal providing a clearance monitor function for insuring write integrity.

Claims (33)

1. A method for implementing channel signal processing assist with an embedded contact sensor (ECS) for hard disk drives comprising:

providing a magnetic recording head including a write pole, a read sensor and a embedded contact sensor (ECS);

said embedded contact sensor (ECS) of said magnetic recording head, applying said ECS signal to a signal multiplexer circuit in a preamplifier of the hard disk drive;

said signal multiplexer circuit capturing an ECS signal during write and idle operation of a hard disk drive including a first multiplexer receiving said ECS signal applied by said magnetic recording head and a reference signal, said first multiplexer providing a modulated ECS signal responsive to a timer select signal; and a second multiplexer receiving said modulated ECS signal and a read signal,

said second multiplexer applying said modulated ECS signal to said read channel responsive to an ECS select signal for monitoring changes in the ECS signal, and

responsive to the monitored changes in the ECS signal, providing a clearance monitor function for insuring write integrity.

2. The method for implementing channel signal processing assist as recited in claim 1 wherein said signal multiplexer circuit capturing an ECS signal during write and idle operation of the hard disk drive include applying said read signal and the ECS signal to said second multiplexer in a preamplifier of the hard disk drive and selecting the ECS signal during write and idle operation of the hard disk drive.

3. The method for implementing channel signal processing assist as recited in claim 2 includes alternately transmitting said reference signal with a detected ECS signal at a predefined rate.

4. The method for implementing channel signal processing assist as recited in claim 2 wherein monitoring changes in the ECS signal includes applying the ECS signal output of said second multiplexer to the read channel only during write and idle operation of a hard disk drive.

5. The method for implementing channel signal processing assist as recited in claim 1 includes applying the ECS signal to an analog-to-digital converter in the read channel and using the ECS signal in signal processing algorithm in the hard disk drive.

6. The method for implementing channel signal processing assist as recited in claim 1 includes applying the ECS signal to a finite-impulse-response (FIR) memory in the hard disk drive.

7. The method for implementing channel signal processing assist as recited in claim 1 includes applying the ECS signal to an ECS measurement logic function for obtaining an envelope waveform around a disk revolution.

8. The method for implementing channel signal processing assist as recited in claim 1 includes using the ECS signal for obtaining a defect waveform around a local disk media area.

9. The method for implementing channel signal processing assist as recited in claim 1 includes using the ECS signal to reduce magnetic write spacing.

10. An apparatus for implementing channel signal processing assist for hard disk drives comprising:

an embedded contact sensor (ECS) providing an ECS signal;

a magnetic recording head including a write pole, a read sensor and said embedded contact sensor (ECS);

a signal multiplexer circuit coupled to said ECS receiving said ECS signal applied by said magnetic recording head; said signal multiplexer circuit including a first multiplexer receiving said ECS signal and a reference signal, said first multiplexer providing a modulated ECS signal responsive to a timer select signal; and a second multiplexer receiving said modulated ECS signal and a read signal, and said second multiplexer applying said modulated ECS signal to said read channel responsive to an ECS select signal;

a read channel coupled to said signal multiplexer circuit receiving said ECS signal during write and idle operation of the hard disk drive and monitoring changes in said ECS signal, and

a processor providing a clearance monitor function responsive to the monitored changes in said ECS signal for insuring write integrity.

11. The apparatus for implementing channel signal processing assist as recited in claim 10 wherein said read channel includes an analog-to-digital converter coupled to a finite-impulse-response (FIR) filter, and said FIR filter applying a sampled ECS signal to a FIR memory in the hard disk drive.

12. The apparatus for implementing channel signal processing assist as recited in claim 11 includes an ECS measurement function using the ECS signal applied to the FIR memory for obtaining an envelope waveform around a disk revolution.

13. The apparatus for implementing channel signal processing assist as recited in claim 12 includes using the ECS signal applied to the FIR memory for obtaining a defect waveform around a local disk media area.

14. The apparatus for implementing channel signal processing assist as recited in claim 11 includes using the ECS signal applied to the FIR memory for classification of defects and for characterization of surface topology around defects.

15. A system for implementing channel signal processing assist comprising:

a hard disk drive including at least one recordable magnetic media;

an embedded contact sensor (ECS) providing an ECS signal;

a magnetic recording head including a write pole, a read sensor and said embedded contact sensor (ECS);

a signal multiplexer circuit coupled to said ECS receiving said ECS signal applied by said magnetic recording head; said signal multiplexer circuit in said preamplifier including a first multiplexer receiving said ECS signal and a reference signal, said first multiplexer providing a modulated ECS signal responsive to a timer select signal; and a second multiplexer receiving said modulated ECS signal and a read signal, and said second multiplexer applying said modulated ECS signal to said read channel responsive to an ECS select signal;

a read channel coupled to said signal multiplexer circuit receiving said ECS signal during write and idle operation of the hard disk drive and monitoring changes in said captured ECS signal, and

a processor providing a clearance monitor function for insuring write integrity, responsive to the monitored changes in said captured ECS signal.

16. The system for implementing channel signal processing assist as recited in claim 15 wherein said read channel includes an analog-to-digital converter coupled to a finite-impulse-response (FIR) filter, and said FIR filter applying a sampled ECS signal to a FIR memory in the hard disk drive.

17. The system for implementing channel signal processing assist as recited in claim 15 includes said processor providing magnetic media defect classification and characterization of surface topology around magnetic media defects using said captured ECS signal.

Assignments (6)
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2016
From: HGST NETHERLANDS B.V.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 040826/0327 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 18, 2012
From: CHE, XIAODONG; HANSON, WELDON MARK
To: HGST NETHERLANDS B.V.
Reel/Frame 028236/0954 →