IP Library Granted Patent US 8,937,793
Granted Patent B2
US 8,937,793 · App. 13/553,746 · Granted Jan 20, 2015

Semiconductor device

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Quick Facts
Patent No.
US 8,937,793
App. No.
13/553,746
Granted
Jan 20, 2015
Kind
B2
Abstract

A semiconductor device comprises a first power supply system, a second power supply system, an output circuit, a first driving circuit and a first protection. The first power supply system is configured with a first power supply voltage and a first ground voltage. The second power supply system is configured with a second power supply voltage and a second ground voltage. The output circuit receives a power supply from the second power supply system. The first driving circuit receives a power supply from the first power supply system and outputs a signal for driving the output circuit. One end of the first protection element is connected to an output node of the output circuit and the other end is connected to the first ground voltage.

Claims (51)

1. A semiconductor device, comprising:

a first power supply system configured with a first power supply voltage and a first ground voltage;

a second power supply system configured with a second power supply voltage and a second ground voltage;

an output circuit that receives a power supply from the second power supply system;

a first driving circuit that receives a power supply from the first power supply system and outputs a signal for driving the output circuit; and

a first protection element with one end thereof connected to an output node of the output circuit and with another end thereof being grounded to the first ground voltage,

wherein the first protection element is configured to form a discharge path between the one end and the other end of the first protection element upon activation.

2. The semiconductor device according to claim 1 , further comprising:

a second protection element connected to include a current flow path from the first ground voltage to the second ground voltage without flowing through the first protection element, wherein

the second protection element includes:

a first diode element connected between the first ground voltage and the second ground voltage; and

a second diode element connected between the first ground voltage and the second ground voltage in an opposite direction to the first diode element.

3. The semiconductor device according to claim 1 , further comprising:

a second protection element connected between the first ground voltage and the second ground voltage, wherein

the second protection element includes:

a first MOS (Metal-Oxide-Semiconductor) transistor connected between the first ground voltage and the second ground voltage, with a gate thereof connected to a first ground potential interconnect; and

a second MOS transistor connected between the first ground voltage and the second ground voltage, with a gate thereof connected to a second ground potential interconnect.

4. The semiconductor device according to claim 1 , wherein

the output node is connected to the second power supply voltage through a third diode element; and

the first protection element comprises a fourth diode element, a cathode of the fourth diode element is connected to the output node, and an anode of the fourth diode element is connected to the first ground voltage.

5. The semiconductor device according to claim 1 , further comprising:

an input circuit that receives a power supply from the second power supply system, wherein

an input node of the input circuit and the output node of the output circuit are connected through an input/output pad.

6. A semiconductor device, comprising:

first to fifth pads disposed on a semiconductor substrate;

a first circuit that is driven by a potential difference between the first and second pads, the first circuit controlling a potential of a first node;

a second circuit that is driven by a potential difference between the third and fourth pads, the second circuit controlling a potential of the fifth pad;

a first protection element connected between the second pad and the fifth pad; and

a second protective element that has one end connected to the fifth pad and another end connected to the second pad without intervention of the first protection element.

7. The semiconductor device according to claim 6 , wherein

the second circuit controls the potential of the fifth pad in response to the potential of the first node.

8. A semiconductor device comprising:

first to fifth pads disposed on a semiconductor substrate;

a first circuit that is driven by a potential difference between the first and second pads, the first circuit controlling a potential of a first node;

a second circuit that is driven by a potential difference between the third and fourth pads, the second circuit controlling a potential of the fifth pad;

a first protection element connected between the second pad and the fourth pad; and

a second protective element that has one end connected to the fifth pad and another end connected to the second pad without an intervention of the first protective element.

9. The device according to claim 8 , further comprising a third protective element that has one end connected to the fourth pad without an intervention of the first protective element and another end connected to the another end of the second protective element.

10. The device according to claim 8 , wherein the second protective element comprises a first diode that has an anode electrode serving as the one end and a cathode serving as the another end.

11. The device according to claim 8 , wherein the first protective element comprises a second diode that has an anode connected to the second pad and a cathode connected to the fourth pad and a third diode that has an anode connected to the fourth pad and a cathode connected to the second pad.

12. The device according to claim 8 , wherein the first protective element comprises a first transistor that has a source-drain path connected between the second and fourth pads and a gate connected to the second pad and a second transistor that has a source-drain path connected between the second and fourth pads and a gate connected to the fourth pad.

13. The device according to claim 9 , wherein the third protective element comprises a diode that has an anode serving as the one end and a cathode serving as the another end.

14. The device according to claim 13 , wherein the third protective element comprises a transistor that has a source-drain path connected between the fourth pad and the another end of the second protective element and a gate connected to the fourth pad.

15. The device according to claim 8 , further comprising a first additional protective element connected between the third and fifth pads.

16. The device according to claim 15 , further comprising a second additional protective element connected between the first and second pads and a third additional protective element connected between third and fourth pads.

17. The device according to claim 8 , wherein the first and third pads are separated from each other and no protective element is provided therebetween.

18. The device according to claim 8 , further comprising a third circuit that is driven by the potential difference between the third and fourth pads and intervenes between the first node and the second circuit.

19. The device according to claim 18 , wherein the third circuit comprises a first output transistor connected between the third and fifth pads and a second transistor connected between the fifth and fourth pads.

20. The device according to claim 18 , further comprising a fourth circuit that is driven by the potential difference between the third and fourth pads and is connected to the fifth pad.

21. The semiconductor device according to claim 3 , wherein the second protection element is connected between the first ground voltage and the second ground voltage without an intervention of the first protective element.

22. The semiconductor device according to claim 1 , wherein the another end of the first protection element is directly connected to the first ground voltage.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2018
From: LONGITUDE SEMICONDUCTOR S.A.R.L.
To: LONGITUDE LICENSING LIMITED
Reel/Frame 046863/0001 →
CHANGE OF NAME Recorded Aug 24, 2016
From: PS5 LUXCO S.A.R.L.
To: LONGITUDE SEMICONDUCTOR S.A.R.L.
Reel/Frame 039793/0880 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2016
From: PS4 LUXCO S.A.R.L.
To: PS5 LUXCO S.A.R.L.
Reel/Frame 039818/0506 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2014
From: ELPIDA MEMORY, INC.
To: PS4 LUXCO S.A.R.L.
Reel/Frame 032899/0196 →
SECURITY AGREEMENT Recorded Jul 29, 2013
From: PS4 LUXCO S.A.R.L.
To: ELPIDA MEMORY INC.
Reel/Frame 032414/0261 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 20, 2012
From: HAYANO, KIMINORI
To: ELPIDA MEMORY, INC.
Reel/Frame 028665/0336 →