Capacitor and method for fabricating the same, and semiconductor device and method for fabricating the same
View Patent ↗The semiconductor device comprises a device isolation region formed in a semiconductor substrate, a lower electrode formed in a device region defined by the device isolation region and formed of an impurity diffused layer, a dielectric film of a thermal oxide film formed on the lower electrode, an upper electrode formed on the dielectric film, an insulation layer formed on the semiconductor substrate, covering the upper electrode, a first conductor plug buried in a first contact hole formed down to the lower electrode, and a second conductor plug buried in a second contact hole formed down to the upper electrode, the upper electrode being not formed in the device isolation region. The upper electrode is not formed in the device isolation region, whereby the short-circuit between the upper electrode and the lower electrode in the cavity can be prevented.
1. A fabricating method of a semiconductor device comprising:
forming a device isolation region in a semiconductor substrate which includes a first device region and a second device region, the device isolation region surrounding the first device region and the second device region;
implanting an impurity into the semiconductor substrate of the second device region other than the first device region to form an impurity diffused layer in the second device region;
forming a gate insulation film on a surface of the first device region, and a dielectric film thicker than the gate insulation film on a surface of the impurity diffused layer, by thermal oxidation; and
forming a gate electrode over the gate insulation film and the device isolation region, and an electrode over the dielectric film, an edge of the electrode being located above the impurity diffused layer.
2. The fabricating method of a semiconductor device according to claim 1 , wherein
forming the device isolation region includes forming a trench in the semiconductor substrate, forming first insulation layer in the trench and over the semiconductor substrate, and polishing the first insulation layer to expose a surface of the semiconductor substrate and to leave a part of the first insulation layer in the trench to form the device isolation region.
3. The fabricating method of a semiconductor device according to claim 1 , wherein
a peak value of impurity concentration of the impurity diffused layer is 1×10 20 cm −3 or more.
4. The fabricating method of a semiconductor device according to claim 1 , further comprising:
forming sacrifice oxidation film on the surface of the semiconductor substrate before implanting the impurity; and
removing the sacrifice oxidation film after implanting the impurity and before forming the gate insulation film and the dielectric film.
5. The fabricating method of a semiconductor device according to claim 1 , further comprising:
forming a second insulation layer on the gate electrode and the electrode; and
forming a first conductor plug, a second conductor plug and a third conductor plug in the second insulation film, the first conductor plug being in contact with the impurity diffused layer, the second conductor plug being in contact with the electrode, and the third conductor plug being in contact with the gate electrode.
6. The fabricating method of a semiconductor device according to claim 5 , further comprising forming an etching stopper film on the gate electrode and the electrode before forming the second insulation film, and
wherein forming the first conductor plug, the second conductor plug and the third conductor plug includes
forming a first contact hole which exposes the etching stopper film, a second contact hole which exposes the etching stopper film and a third contact hole which exposes the etching stopper film,
removing the etching stopper film in the first contact hole, the second contact hole and the third contact hole, and
forming the first conductor plug, the second conductor plug and the third conductor plug in the first contact hole, the second contact hole and the third contact hole respectively after removing the etching stopper film.
7. The fabricating method of a semiconductor device according to claim 1 , wherein whole of the edge of the electrode is located above the impurity diffused layer.
8. The fabricating method of a semiconductor device according to claim 1 , wherein the impurity diffused layer is contact with the device isolation region.