IP Library Granted Patent US 9,135,871
Granted Patent B2
US 9,135,871 · App. 13/566,518 · Granted Sep 15, 2015

Integrated circuit design method for improved testability

Inventors: Takashi Nose (Kanagawa, JP); Hirobumi Furihata (Kanagawa, JP)
Assignee: Synaptics Display Devices GK
G09G3/3611G09G2320/0252G09G2320/0261G09G2320/103G09G2330/021G09G2340/16
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Quick Facts
Patent No.
US 9,135,871
App. No.
13/566,518
Granted
Sep 15, 2015
Kind
B2
Abstract

A display device is provided with a display panel; and a display panel driver driving the display panel in response to externally-provided image data. The display panel driver includes a display memory for storing the image data, and is configured to perform overdrive processing on the image data read from the display memory. The display panel driver includes an overdrive processing control circuit detecting writing of the image data into the display memory to control operation and halt of a circuit used for the overdrive processing.

Claims (51)

1. A display device, comprising:

a display panel; and

a display panel driver driving said display panel in response to externally-provided image data,

wherein said display panel driver includes:

a display memory which stores said externally-provided image data as current frame image data corresponding to an image of a current frame, said externally-provided image data being written into said display memory in a synchronization with a write clock;

an overdrive memory which receives and stores at least a portion of said image data stored in said display memory as previous frame image data corresponding to an image of a previous frame;

an overdrive processing circuit configured to perform an overdrive processing on said current frame image data read from said display memory, in response to said previous frame image data, to generate resultant image data;

a drive circuit driving said display panel in response to said resultant image data; and

an overdrive processing control circuit detecting writing of said externally-provided image data into said display memory, by monitoring an activity of said write clock, and

wherein said overdrive processing control circuit is responsive to the activity of said write clock for each frame for allowing and prohibiting a write operation of said previous frame image data into said overdrive memory, a read operation of said previous frame image data from said overdrive memory, and said overdrive processing performed by said overdrive processing circuit.

2. The display device according to claim 1 , wherein reading of said image data from said display memory and reading of said previous frame image data from said overdrive memory are performed in synchronization with a read clock, and

wherein said overdrive processing control circuit is configured:

to assert a write flag when supply of said write clock is started;

to assert an overdrive processing select signal for said allowing said write operation of said previous frame image data into said overdrive memory, said read operation of said previous frame image data from said overdrive memory, and said overdrive processing by using said overdrive processing circuit, when a supply of said read clock is started with said write flag asserted;

to negate said write flag when a predetermined period expires after said overdrive processing select signal is asserted; and

to negate said overdrive processing select signal when a supply of said read clock is terminated in each frame period.

3. The display device according to claim 1 , said overdrive processing control circuit detecting said write operation of said image data into said display memory thereby providing an automatic control of said overdrive processing for each frame of image data.

4. The display device according to claim 1 , wherein said write clock is fed to said display memory.

5. The display device of claim 1 , wherein said display memory comprises a dual port memory having a capability of writing image data into the display memory asynchronously from reading of image data from the display memory.

6. The display device according to claim 1 , wherein the read operation from said overdrive memory is performed in a synchronization with a read clock fed to said overdrive memory, and

wherein the read operation from said overdrive memory is prohibited in response to the activity of said write clock through a stopping of a feeding of said read clock to said overdrive memory.

7. A display panel driver for driving a display panel in response to externally-provided image data, said display panel driver comprising:

a display memory which stores said externally-provided image data as current frame image data corresponding to an image of a current frame, said externally-provided image data being written into said display memory in a synchronization with a write clock;

an overdrive memory which receives and stores at least a portion of said image data stored in said display memory as previous frame image data corresponding to an image of a previous frame;

an overdrive processing circuit configured to perform an overdrive processing on said current frame image data read from said display memory in response to said previous frame image data to generate resultant image data;

a drive circuit driving said display panel in response to said resultant image data; and

an overdrive processing control circuit detecting writing of said externally-provided image data into said display memory, by monitoring an activity of said write clock,

wherein said overdrive processing control circuit is responsive to the activity of said write clock for each frame for allowing and prohibiting a write operation of said previous frame image data into said overdrive memory, a read operation of said previous frame image data from said overdrive memory, and said overdrive processing performed by said overdrive processing circuit.

8. The display panel driver according to claim 7 , wherein reading of said image data from said display memory and reading of said previous frame image data from said overdrive memory are performed in synchronization with a read clock, and

wherein said overdrive processing control circuit is configured:

to assert a write flag when supply of said write clock is started;

to assert an overdrive processing select signal for allowing writing of said previous frame image data into said overdrive memory, reading of said previous frame image data from said overdrive memory, and said overdrive processing by using said overdrive processing circuit, when supply of said read clock is started with said write flag asserted;

to negate said write flag when a predetermine period expires after said overdrive processing select signal is asserted; and

to negate said overdrive processing select signal when supply of said read clock is terminated in each frame period.

9. The display panel driver according to claim 7 , said overdrive processing control circuit detecting said write operation of said externally-provided image data into said display memory thereby providing an automatic control of said overdrive processing for each frame of image data.

10. The display panel driver according to claim 7 , wherein said write clock is fed to said display memory.

11. The display panel drive of claim 7 , wherein said display memory comprises a dual port memory having a capability of writing image data into the display memory asynchronously from reading of image data from the display memory.

12. The display panel driver according to claim 7 , wherein the read operation from said overdrive memory is performed in a synchronization with a read clock fed to said overdrive memory, and

wherein the read operation from said overdrive memory is prohibited in response to the activity of said write clock through a stopping of a feeding of said read clock to said overdrive memory.

13. A display panel drive method, comprising:

storing image data as current frame image data corresponding to an image of a current frame into a display memory in a synchronization with a write clock;

storing into an overdrive memory at least a portion of said image data stored in said display memory as previous frame image data corresponding to an image of a previous frame;

performing an overdrive processing on said current frame image data read from said display memory in response to said previous frame image data to generate resultant image data;

driving said display panel in response to said resultant image data;

detecting a writing of said externally-provided image data into said display memory, by monitoring an activity of said write clock; and

in response to the activity of said write clock for each frame, allowing and prohibiting a write operation of said previous frame image data into said overdrive memory, a read operation of said previous frame image data from said overdrive memory, and said overdrive processing.

14. The display panel drive method according to claim 13 , wherein said detecting the writing of said externally-provided thereby provides an automatic control of said overdrive processing for each frame of image data.

15. The display panel drive method according to claim 13 , wherein said write clock is fed to said display memory.

16. The display panel drive method according to claim 13 , wherein said display memory comprises a dual port memory having a capability of writing image data into the display memory asynchronously from reading of image data from the display memory.

17. The display panel drive method according to claim 13 , wherein the read operation from said overdrive memory is performed in a synchronization with a read clock fed to said overdrive memory, and

wherein the read operation from said overdrive memory is prohibited in response to the activity of said write clock through a stopping of a feeding of said read clock to said overdrive memory.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 20, 2024
From: SYNAPTICS JAPAN GK
To: SYNAPTICS INCORPORATED
Reel/Frame 067793/0211 →
SECURITY INTEREST Recorded Sep 27, 2017
From: SYNAPTICS INCORPORATED
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 044037/0896 →
CHANGE OF NAME Recorded Aug 8, 2016
From: SYNAPTICS DISPLAY DEVICES GK
To: SYNAPTICS JAPAN GK
Reel/Frame 039711/0862 →
CHANGE OF NAME Recorded May 29, 2015
From: RENESAS SP DRIVERS INC.
To: SYNAPTICS DISPLAY DEVICES KK
Reel/Frame 035796/0947 →
CHANGE OF NAME Recorded May 29, 2015
From: SYNAPTICS DISPLAY DEVICES KK
To: SYNAPTICS DISPLAY DEVICES GK
Reel/Frame 035797/0036 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 19, 2014
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS SP DRIVERS INC.
Reel/Frame 033778/0137 →
Priority Claims (1)
JP 2008-140179 · May 28, 2008 · national
Continuity (2)
Continuation 12453930 · May 27, 2009
Related Publication 20120293525A1 · Nov 22, 2012