SEMICONDUCTOR DEVICE
A semiconductor device comprises an MIS field effect transistor including a channel region made of p-conductive silicon, a gate insulating film including a first insulating film having dielectric constant higher than dielectric constant of silicon dioxide, and a gate electrode. The gate electrode includes a first metal film formed on the gate insulating film and having a work function greater than a work function of intrinsic semiconductor silicon, and a p-conductive silicon film formed on the first metal film and in contact with the first metal film.
1 . A semiconductor device comprising an MIS field effect transistor,
the MIS field effect transistor comprising:
a channel region made of p-conductive silicon;
a gate insulating film including a first insulating film that is higher in dielectric constant than silicon dioxide; and
a gate electrode formed on the gate insulating film, the gate electrode including a first metal film and a p-conductive silicon film, the first metal film being greater in work function than intrinsic semiconductor silicon, the first metal film and the p-conductive silicon film being in contact with each other.
2 . The semiconductor device according to claim 1 ,
wherein the first insulating film is higher in dielectric constant than silicon nitride.
3 . The semiconductor device according to claim 1 ,
wherein the first insulating film and the first metal film are in contact with each other.
4 . The semiconductor device according to claim 1 ,
wherein the gate electrode further includes a second metal film in contact with the p-conductive silicon film, the second metal film being greater in work function than intrinsic semiconductor silicon, and
the p-conductive silicon film is formed between the first and second metal films.
5 . The semiconductor device according to claim 1 ,
wherein the first metal film contains titanium nitride, tantalum nitride, hafnium nitride, or titanium carbide.
6 . The semiconductor device according to claim 4 ,
wherein the second metal film contains titanium nitride, tantalum nitride, hafnium nitride, titanium carbide or tungsten nitride.
7 . The semiconductor device according to claim 1 ,
wherein the first insulating film contains at least one insulating material selected from the group consisting of HfSiON, ZrO 2 , Ta 2 O 5 , Nb 2 O 5 , Al 2 O 3 , HfO 2 , Sc 2 O 3 , Y 2 O 3 , La 2 O 3 , CeO 2 , Pr 2 O 3 , Nd 2 O 3 , Sm 2 O 3 , Eu 2 O 3 , Gd 2 O 3 , Tb 2 O 3 , Dy 2 O 3 , Ho 2 O 3 , Er 2 O 3 , Tm 2 O 3 , Yb 2 O 3 , Lu 2 O 3 , HfSiO, ZrSiO and ZrSiON.
8 . The semiconductor device according to claim 1 ,
wherein concentration of a p-conductive impurity in the p-conductive silicon film ranges from 1×10 20 to 1×10 21 /cm 3 .
9 . The semiconductor device according to claim 1 ,
wherein the p-conductive silicon film contains at least one element selected from the group consisting of boron, indium, and gallium.
10 . A semiconductor device comprising:
a p-conductive first semiconductor region formed in a surface of a semiconductor substrate;
a first insulating film that covers part of the p-conductive first semiconductor region and contains a first insulating material having dielectric constant higher than dielectric constant of silicon dioxide;
a conductive film formed on the first insulating film, the conductive film including a first metal film and a p-conductive silicon film, the first metal film having a work function greater than a work function of intrinsic semiconductor silicon, the p-conductive silicon film being in contact with the first metal film; and
an n-conductive second semiconductor region formed in a portion of the p-conductive first semiconductor region located under each of sidewalls of the conductive film.
11 . The semiconductor device according to claim 10 ,
wherein the first insulating film has the dielectric constant higher than dielectric constant of silicon nitride.
12 . The semiconductor device according to claim 10 ,
wherein the first insulating film is in contact with the first metal film.
13 . The semiconductor device according to claim 10 ,
wherein the conductive film further includes a second metal film formed in contact with the p-conductive silicon film, the second metal film having a work function greater than the work function of intrinsic semiconductor silicon.
14 . A semiconductor device comprising an n-channel transistor and a p-channel transistor,
wherein each of the n-channel transistor and the p-channel transistor includes:
a gate insulating film including a first insulating film formed on a semiconductor substrate and having a higher dielectric constant than silicon dioxide;
a gate electrode including a first metal film formed on the gate insulating film, the first metal film having a greater work function than intrinsic semiconductor silicon; and
an conductive film including a p-type silicon formed in contact with the first metal film.
15 . The semiconductor device according to claim 14 ,
wherein the semiconductor substrate in contact with the gate insulating film of the n-channel transistor is made of p-type silicon, and
the semiconductor substrate in contact with the gate insulating film of the p-channel transistor is made of n-type silicon.
16 . The semiconductor device according to claim 14 ,
wherein the gate insulating film further includes a second insulating film formed between the semiconductor substrate and the first insulating film, the second insulating film comprising silicon dioxide.
17 . The semiconductor device according to claim 14 ,
wherein the dielectric constant of the first insulating film is higher than a dielectric constant of silicon nitride.
18 . The semiconductor device according to claim 14 ,
wherein the first insulating film is in contact with the first metal film.
19 . The semiconductor device according to claim 14 ,
wherein the n-channel transistor further includes a second metal film formed in contact with the conductive film thereof, the second metal film having a greater work function than intrinsic semiconductor silicon.
20 . The semiconductor device according to claim 19 ,
further comprising a peripheral circuit region and a memory cell region,
wherein the peripheral circuit region includes the n-channel transistor and the p-channel transistor, and
the memory cell region includes a memory-cell transistor, a capacitor electrically connected to one of a source and a drain of the memory-cell transistor, and a bit line electrically connected to the other one of the source and the drain of the memory-cell transistor.