IP Library Granted Patent US 8,604,760
Granted Patent B1
US 8,604,760 · App. 13/569,109 · Granted Dec 10, 2013

Voltage regulator using front and back gate biasing voltages to output stage transistor

Inventor: Damaraju Naga Radha Krishna (LaJolla, CA)
Assignee: Cypress Semiconductor Corp.
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Quick Facts
Patent No.
US 8,604,760
App. No.
13/569,109
Granted
Dec 10, 2013
Kind
B1
Abstract

A method involves regulating an output voltage of an output transistor of a voltage regulator circuit by providing a first voltage to a front gate of the output transistor, and simultaneously with providing the first voltage to the output transistor, providing a second voltage to a back gate of the output transistor, in a manner that regulates the output voltage around a target value.

Claims (39)

1. A replica biased voltage regulator comprising:

an output transistor;

first and second voltage sources configured to simultaneously supply first and second voltages to a front gate and a back gate, respectively, of the output transistor; and

a control circuit to vary the second voltage on the back gate of the output transistor to maintain an output voltage of the replica biased voltage regulator around a target value.

2. The circuit of claim 1 , further comprising:

an input stage transistor coupled in series with a voltage divider network between a power supply node and ground;

the control circuit configured to compare a feedback voltage provided by the voltage divider network to a first reference voltage.

3. The circuit of claim 2 , wherein the control circuit comprises an operational amplifier coupled to provide an input feedback loop with the input stage transistor and the voltage divider network.

4. The circuit of claim 1 , further comprising:

the output transistor coupled in series with a voltage divider network between a power supply node and ground;

a load circuit coupled in parallel with the voltage divider network at an output node of the replica bias voltage regulator; and

a comparator configured to compare a feedback voltage provided by the voltage divider network to a reference voltage.

5. The circuit of claim 4 , wherein the load circuit comprises a load capacitor.

6. The circuit of claim 4 , wherein the comparator is coupled to provide an output feedback loop with the voltage divider network and the back gate of the output transistor.

7. The circuit of claim 4 , wherein the comparator is one of a linear amplifier and a non-linear voltage comparator.

8. The circuit of claim 4 , wherein the first and second voltages are each supplied from a reference voltage source.

9. The circuit of claim 4 , wherein the first voltage comprises a reference voltage supplied from a reference voltage source, and wherein the second voltage comprises a feedback voltage provided by the voltage divider network.

10. The circuit of claim 4 , wherein at least one of the first and second voltages is supplied from a band gap reference voltage source.

11. A method of load regulation in a replica biased voltage regulator circuit, the method comprising:

applying a first voltage to a front gate of an output transistor of the replica biased voltage regulator circuit simultaneously with applying a second voltage to the back gate of the output transistor; and

varying the second voltage on the back gate to regulate an output voltage of the output transistor around a target value.

12. The method of claim 11 , further comprising:

adjusting a threshold voltage of the output transistor by applying the second voltage to the back gate of the output transistor.

13. The method of claim 11 , further comprising:

generating the first voltage by applying a reference voltage and a first feedback voltage provided by an input feedback loop.

14. The method of claim 13 , further comprising:

generating the second voltage by applying the reference voltage and a second feedback voltage provided by an output feedback loop.

15. The method of claim 13 , further comprising:

generating the second voltage is by applying the first feedback voltage and a second feedback voltage provided by an output feedback loop.

16. The method of claim 15 , further comprising:

maintaining stability in the output feedback loop by way of a load capacitor coupled to the output transistor.

17. The method of claim 11 , further comprising:

generating the second voltage using a comparator.

18. The method of claim 11 , further comprising:

generating the second bias voltage by way of a non-linear voltage comparator.

19. The method of claim 18 , further comprising:

maintaining stability in the output feedback loop by way of hysteresis included within the non-linear voltage comparator.

20. A method, comprising:

regulating an output voltage of an output transistor of a voltage regulator circuit by providing a first voltage to a front gate of the output transistor, and simultaneously with providing the first voltage to the output transistor, providing a second voltage to a back gate of the output transistor, in a manner that regulates the output voltage around a target value.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 040911/0238 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS Recorded Aug 11, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 039708/0001 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 24, 2013
From: KRISHNA, DAMARAJU NAGA RADHA
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 030868/0042 →
Continuity (2)
Continuation 12195912 · Aug 21, 2008
Provisional Application 60976400 · Sep 28, 2007