Routing trace compensation

1. A method of operating a capacitive input device,

wherein said capacitive input device comprises:

first and second pluralities of sensor electrodes disposed in a first region of a substrate, wherein said first region is configured to overlap a display screen;

at least one routing trace disposed in a second region of said substrate and ohmically coupled to a sensor electrode of one of said first and second pluralities of sensor electrodes and also to a processing system, wherein said second region comprises a non-display screen overlapping portion of said substrate; and

a compensation trace disposed in said second region of said substrate and ohmically coupled to said processing system, said compensation trace being substantially parallel and proximate to said at least one routing trace and having substantially the same length along a side edge of said first region as said at least one routing trace, wherein said compensation trace is not ohmically coupled to any sensor electrode located in said first region; and

said method comprising:

when performing transcapacitive sensing with said capacitive input device, driving a voltage on said compensation trace; and

when performing absolute capacitive sensing with said capacitive input device:

receiving signals on said compensation trace to measure a capacitance related to an input object in said second region; and

utilizing said received signals to compensate for sensitivity of said at least one routing trace to said input object in said second region.

2. The method as recited in claim 1 , wherein said driving a voltage on said compensation trace comprises:

driving a substantially constant voltage on said compensation trace such that said compensation trace acts as a shield.

3. The method as recited in claim 1 , wherein said driving a voltage on said compensation trace comprises:

driving a substantially constant voltage on said compensation trace such that said compensation trace is maintained at a virtual ground potential.

4. The method as recited in claim 1 , wherein said utilizing said received signals to compensate for sensitivity of said at least one routing trace to said input object in said second region comprises:

subtracting said measured capacitance from a capacitance measured on said at least one routing trace.

5. The method as recited in claim 1 , wherein said utilizing said received signals to compensate for sensitivity of said at least one routing trace to said input object in said second region comprises:

subtracting said measured capacitance from each of a plurality routing traces that are proximate to and parallel with said compensation trace.

6. The method as recited in claim 1 , wherein said utilizing said received signals to compensate for sensitivity of said at least one routing trace to said input object in said second region comprises:

subtracting a scaled amount of said measured capacitance from a capacitance measured on said at least one routing trace, wherein said scaled amount is based upon a relationship between a surface area of said at least one routing trace as compared to a surface area of said compensation trace.

7. The method as recited in claim 1 , wherein said utilizing said received signals to compensate for sensitivity of said at least one routing trace to said input object in said second region comprises:

subtracting a scaled amount of said measured capacitance from a capacitance measured on said at least one routing trace, wherein said scaled amount is based on a distance between said compensation trace and said at least one routing trace.

8. A processing system for a capacitive input device,

wherein said capacitive input device comprises:

first and second pluralities of sensor electrodes disposed in a first region of a substrate, wherein said first region is configured to overlap a display screen;

at least one routing trace disposed in a second region of said substrate and ohmically coupled to a sensor electrode of one of said first and second pluralities of sensor electrodes and also to a processing system, wherein said second region comprises a non-display screen overlapping portion of said substrate; and

a compensation trace disposed in said second region of said substrate and ohmically coupled to said processing system, said compensation trace being substantially parallel and proximate to said at least one routing trace and having substantially the same length along a side edge of said first region as said at least one routing trace, wherein said compensation trace is not ohmically coupled to any sensor electrode; and

said processing system comprising:

sensor circuitry configured to drive a voltage on said compensation trace when performing transcapacitive sensing with said first and second pluralities of sensor electrodes;

said sensor circuitry configured to receive signals on said compensation trace to measure a capacitance related to an input object in said second region when performing absolute capacitive sensing with said first and second pluralities of electrodes; and

computation circuitry configured to utilize said received signals to compensate for sensitivity of said at least one routing trace to said input object in said second region.

9. The processing system of claim 8 , wherein said voltage on said compensation trace comprises:

a substantially constant voltage on said compensation trace such that said compensation trace acts as a shield.

10. The processing system of claim 8 , wherein said voltage on said compensation trace comprises:

a substantially constant voltage on said compensation trace such that said compensation trace is maintained at a virtual ground potential.

11. The processing system of claim 8 , wherein said computation circuitry configured to utilize said received signals to compensate for sensitivity of said at least one routing trace to said input object in said second region comprises:

said computation circuitry being configured to subtract said measured capacitance from a capacitance measured on said at least one routing trace.

12. The processing system of claim 8 , wherein said computation circuitry configured to utilize said received signals to compensate for sensitivity of said at least one routing trace to said input object in said second region comprises:

said computation circuitry being configured to subtract said measured capacitance from each of a plurality routing traces that are proximate to and parallel with said compensation trace.

13. The processing system of claim 8 , wherein said computation circuitry configured to utilize said received signals to compensate for sensitivity of said at least one routing trace to said input object in said second region comprises:

said computation circuitry being configured to subtract a scaled amount of said measured capacitance from a capacitance measured on said at least one routing trace, wherein said scaled amount is based upon a relationship of a surface area of said at least one routing trace as compared to a surface area of said compensation trace.

14. The processing system of claim 8 , wherein said computation circuitry configured to utilize said received signals to compensate for sensitivity of said at least one routing trace to said input object in said second region comprises:

said computation circuitry being configured to subtract a scaled amount of said measured capacitance from a capacitance measured on said at least one routing trace, wherein said scaled amount is based on a distance between said compensation trace and said at least one routing trace.