IP Library Granted Patent US 8,947,128
Granted Patent B2
US 8,947,128 · App. 13/628,920 · Granted Feb 3, 2015

Semiconductor device having input receiver circuit that operates in response to strobe signal

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Quick Facts
Patent No.
US 8,947,128
App. No.
13/628,920
Granted
Feb 3, 2015
Kind
B2
Abstract

Disclosed herein is a device that includes an input receiver circuit activated by a strobe signal to generate an output signal by comparing a potential of an input signal with a reference potential, and a noise canceller cancelling noise superimposed on the reference potential due to a change in the strobe signal.

Claims (32)

1. A semiconductor device comprising:

an input receiver circuit activated by a strobe signal to generate an output signal by comparing a potential of an input signal with a reference potential; and

a noise canceller cancelling noise superimposed on the reference potential due to a change in the strobe signal,

wherein the noise canceller comprises:

an opposite-phase signal generation circuit generating an opposite-phase signal of the strobe signal;

a first replica transistor controlled by the reference potential; and

a second replica transistor connected to the first replica transistor and controlled by the opposite-phase signal.

2. The semiconductor device as claimed in claim 1 , wherein

the input receiver circuit comprises:

a first transistor controlled by the reference potential; and

a second transistor connected to the first transistor and controlled by the strobe signal.

3. The semiconductor device as claimed in claim 2 , wherein the first transistor and the first replica transistor have substantially the same characteristics as each other.

4. The semiconductor device as claimed in claim 2 , further comprising a timing adjustment circuit to substantially match a timing when the strobe signal is supplied to the second transistor with a timing when the opposite-phase signal is supplied to the second replica transistor.

5. The semiconductor device as claimed in claim 2 , wherein the input receiver circuit further comprises a third transistor controlled by the input signal, the first and third transistors are commonly connected to the second transistor.

6. The semiconductor device as claimed in claim 1 , further comprising a reference potential generation circuit generating the reference potential based on a power supply potential supplied from outside.

7. The semiconductor device as claimed in claim 1 , further comprising a strobe receiver circuit generating the strobe signal by comparing potentials of first and second external strobe signals supplied from outside.

8. The semiconductor device as claimed in claim 7 , wherein

the first and the second external strobe signals have amplitude between a first potential and a second potential,

potentials of the first and second external strobe signals are complementary to each other during a period when the input signal is supplied, and

potentials of the first and second external strobe signals are fixed to either one of the first and second potentials during at least a part of a period when the input signal is not supplied.

9. The semiconductor device as claimed in claim 1 , wherein a plurality of the input receiver circuits are provided, the noise canceller being allocated to each of the plurality of the input receiver circuits.

10. The semiconductor device as claimed in claim 1 , wherein a plurality of the input receiver circuits are provided, the one noise canceller being commonly allocated to the plurality of the input receiver circuits.

11. A semiconductor device comprising:

an input circuit comparing an input signal supplied via an input signal line with a reference voltage supplied via a reference voltage supply line to output an output signal, an operation timing of the input circuit being controlled by a control signal supplied via a control signal line; and

a noise cancellation circuit connected between the control signal line and the reference voltage supply line,

wherein the noise cancellation circuit comprises an opposite-phase signal generation circuit generating an opposite-phase signal of the control signal, a first replica transistor controlled by the reference potential, and a second replica transistor connected to the first replica transistor and controlled by the opposite-phase signal, and

wherein any circuit that cancels noise is not connected between the control signal line and the input signal line.

12. The semiconductor device as claimed in claim 11 , wherein the noise cancellation circuit reduces noise superimposed on the reference voltage due to a transition of the control signal.

13. The semiconductor device as claimed in claim 11 , further comprising:

an external signal terminal connected to the input signal line;

an external power supply terminal supplied with a predetermined voltage from outside; and

a reference potential generation circuit connected between the reference voltage supply line and the external power supply terminal to generate the reference voltage based on the predetermined voltage.

Assignments (5)
CHANGE OF NAME Recorded Aug 24, 2016
From: PS5 LUXCO S.A.R.L.
To: LONGITUDE SEMICONDUCTOR S.A.R.L.
Reel/Frame 039793/0880 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2016
From: PS4 LUXCO S.A.R.L.
To: PS5 LUXCO S.A.R.L.
Reel/Frame 039818/0506 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2014
From: ELPIDA MEMORY, INC.
To: PS4 LUXCO S.A.R.L.
Reel/Frame 032898/0319 →
SECURITY AGREEMENT Recorded Jul 29, 2013
From: PS4 LUXCO S.A.R.L.
To: ELPIDA MEMORY INC.
Reel/Frame 032414/0261 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 19, 2012
From: DONO, CHIAKI; NARUI, SEIJI; MARUNO, SEIICHI
To: ELPIDA MEMORY, INC.
Reel/Frame 029318/0750 →