Signal transmitting-receiving control circuit and secondary battery protection circuit
View Patent ↗A signal transmitting-receiving circuit includes a first circuit including a first MOS transistor having a gate and a drain, a second MOS transistor having a gate and a drain connected to the gate and drain of the first MOS transistor, and a source connected to ground, and a transmitting terminal transmitting a signal connected to the drains of the first and second MOS transistors; and a second circuit including a receiving terminal receiving the signal transmitted from the transmitting terminal of the first circuit connected to the transmitting terminal, a third MOS transistor having a gate connected to the receiving terminal, a drain connected to a reference voltage generator circuit and a source connected to ground, a resistor connected between the third MOS transistor and the reference voltage generator circuit, and an output terminal connected between the resistor and the third MOS transistor.
1. A signal transmitting-receiving circuit comprising:
a first circuit including:
a first MOS transistor having a gate and a drain, and configured to be switched on by a signal supplied to the gate thereof;
a second MOS transistor having a gate connected to the gate of the first MOS transistor, a drain connected to the drain of the first MOS transistor and a source connected to ground, and configured to be switched on by a high signal supplied to the gate thereof; and
a transmitting terminal connected to the respective drains of the first MOS transistor and the second MOS transistor, and configured to transmit a signal; and
a second circuit including:
a receiving terminal connected to the transmitting terminal of the first circuit, and configured to receive the signal transmitted from the transmitting terminal thereof;
a third MOS transistor having a gate connected to the receiving terminal, and a drain connected to a reference voltage generator circuit;
a resistor connected between the third MOS transistor and the reference voltage generator circuit;
an output terminal connected between the resistor and the third MOS transistor;
a fourth MOS transistor having a gate connected to the receiving terminal;
a drain connected to ground and a source connected to the reference voltage generator circuit;
an external signal receiving resistor connected between the fourth MOS transistor and the ground; and
an external signal receiving output terminal connected between the external signal receiving resistor and the fourth MOS transistor,
wherein a source of the third MOS transistor is connected to ground.
2. The signal transmitting-receiving circuit as claimed in claim 1 , wherein a source of the third MOS transistor is connected to ground.
3. The signal transmitting-receiving circuit as claimed in claim 1 , wherein the resistor is formed of one of an NMOS transistor and a PMOS transistor.
4. The signal transmitting-receiving circuit as claimed in claim 1 , wherein the external signal receiving resistor is formed of one of an NMOS transistor and a PMOS transistor.
5. A signal transmitting-receiving circuit comprising:
a first circuit including:
a first MOS transistor having a gate and a drain, and configured to be switched on by a signal supplied to the gate thereof;
a second MOS transistor having a gate connected to the gate of the first MOS transistor, a drain connected to the drain of the first MOS transistor and a source connected to ground, and configured to be switched on by a high signal supplied to the gate thereof; and
a transmitting terminal connected to the respective drains of the first MOS transistor and the second MOS transistor, and configured to transmit a signal; and
a second circuit including:
a receiving terminal connected to the transmitting terminal of the first circuit, and configured to receive the signal transmitted from the transmitting terminal thereof;
a third MOS transistor having a gate connected to the receiving terminal, and a drain connected to a reference voltage generator circuit;
a resistor connected between the third MOS transistor and the reference voltage generator circuit;
an output terminal connected between the resistor and the third MOS transistor;
a fourth MOS transistor having a gate connected to the gate of the third MOS transistor;
a drain connected to a source voltage of the second circuit and a source connected to the reference voltage generator circuits;
an external signal receiving resistor connected between the fourth MOS transistor and the source voltage of the second circuit; and
an external signal receiving output terminal connected between the external signal receiving resistor and the fourth MOS transistor.
6. The signal transmitting-receiving circuit as claimed in claim 5 ,
wherein the external signal receiving resistor is formed of one of an NMOS transistor and a PMOS transistor.
7. The signal transmitting-receiving circuit as claimed in claim 5 , wherein the resistor is formed of one of an NMOS transistor and a PMOS transistor.