IP Library Granted Patent US 8,680,832
Granted Patent B2
US 8,680,832 · App. 13/685,827 · Granted Mar 25, 2014

Control circuit of step-down DC-DC converter, control circuit of step-up DC-DC converter and step-up/step-down DC-DC converter

Inventor: Toru Miyamae (Kasugai, JP)
Assignee: Spansion LLC
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Quick Facts
Patent No.
US 8,680,832
App. No.
13/685,827
Granted
Mar 25, 2014
Kind
B2
Abstract

A DC-DC converter or the like capable of generating a stable output voltage is provided. A control circuit 11 of a current mode step-down DC-DC converter 1 includes a slope compensation circuit SC and an offset circuit IF 1 . The slope compensation circuit SC adds an increase gradient m 2 due to slope compensation to an increase gradient of a coil current waveform Vsense in a range wherein an ON period Ton of a switch SW 1 exceeds ½ of an operating cycle T. An offset circuit IF 1 applies an offset voltage Voffset which becomes smaller depending on the ON period Ton in excess of ½ of an operating cycle T, to a coil current waveform Vsense.

Claims (17)

1. A control circuit of a step-down DC-DC converter comprising:

a main switching element which is coupled in series with a coil, which is coupled between an input terminal and an output terminal, wherein an input voltage is applied to the input terminal and an output voltage is output from the output terminal;

a differential amplifier configured to output a differential signal between the output voltage and a reference voltage;

a current sensing unit configured to detect a coil current flowing through the coil and to output a sense current;

set circuit configured to add an offset current to the sense current;

a current-to-voltage converting unit configured to convert a current to a voltage, wherein the current is obtained by adding the offset current to the sense current;

a slope compensation circuit configured to output a slope signal which includes a first increase slope which is greater than a second increase slope based on the second increase slope of the voltage converted by the current-to-voltage converting unit; and

a control circuit configured to compare the differential signal with the slope signal and to control the main switching element,

wherein the offset circuit increases the offset current depending on an increase of the input voltage or a decrease of the output voltage, when the input voltage is more than the output voltage, and when the input voltage is not more than twice of the output voltage.

2. A control circuit of a step-up DC-DC converter comprising:

a main switching element which is coupled in series with a coil, which is coupled between an input terminal and an output terminal, wherein an input voltage is applied to the input terminal and an output voltage is output from the output terminal;

a differential amplifier configured to output a differential signal between the output voltage and a reference voltage; a current sensing unit configured to detect a coil current flowing through the coil and to output a sense current;

an offset circuit configured to add an offset current to the sense current; a current-to-voltage converting unit configured to convert a current to a voltage, wherein the current is obtained by adding the offset current to the sense current;

a slope compensation circuit configured to output a slope signal which includes a first increase slope which is greater than a second increase slope based on the second increase slope of the voltage converted by the current-to-voltage converting unit; and

a control circuit configured to compare the differential signal with the slope signal and to control the main switching element,

wherein the offset circuit increases the offset current depending on an increase of the input voltage or a decrease of the output voltage.

3. The control circuit of a step-up DC-DC converter according to claim 2 , wherein the offset circuit controls a first increase amount to be greater than a second increase amount, the first increase amount being an increase amount of the offset current against the input voltage when the input voltage is not more than half of the output voltage and the second increase amount being an increase amount of the offset current against the input voltage when the input voltage is more than half of the output voltage.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: SPANSION LLC
Reel/Frame 031205/0461 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2013
From: MIYAMAE, TORU
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 030771/0247 →
Priority Claims (1)
JP 2008-153889 · Jun 12, 2008 · national
Continuity (2)
Division 12475982 · Jun 1, 2009
Related Publication 20130088207A1 · Apr 11, 2013