IP Library Granted Patent US 8,908,812
Granted Patent B2
US 8,908,812 · App. 13/736,661 · Granted Dec 9, 2014

Methods and apparatus for map detection with reduced complexity

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Quick Facts
Patent No.
US 8,908,812
App. No.
13/736,661
Granted
Dec 9, 2014
Kind
B2
Abstract

Methods and apparatus are provided for high-speed, low-power, high-performance channel detection. A soft-output detector is provided for processing a received signal, comprising: a forward detector for calculating forward state metrics; a backward detector for calculating backward state metrics; and a current branch detector for calculating a current branch metric, wherein at least two of the forward detector, the backward detector and the current branch detector employ trellis structures with a different number of states. A method is provided for processing a received signal using a soft-output detector, comprising: calculating forward state metrics using a forward detector; calculating backward state metrics using a backward detector; and calculating a current branch metric using a current branch detector, wherein at least two of the forward detector, the backward detector and the current branch detector employ trellis structures with a different number of states.

Claims (26)

1. A soft-output detector for processing a received signal, comprising:

a forward detector for calculating forward state metrics;

a backward detector for calculating backward state metrics; and

a current branch detector for calculating a current branch metric, wherein at least two of said forward detector, said backward detector and said current branch detector employ trellis structures with a different maximum number of states.

2. The soft-output detector of claim 1 , wherein said forward detector uses a four state, radix 2 N trellis with or without feedback, with N≧2, where N is a number of received samples.

3. The soft-output detector of claim 1 , wherein said backward state metrics are unraveled by setting initial backward state metrics to 0 and calculating a best path leaving each current backward state in a forward direction.

4. The soft-output detector of claim 1 , wherein forward branch metrics are used by said forward detector to calculate said forward state metrics and also used by said backward detector to calculate at least a portion of said backward state metrics, and wherein the soft-output detector further comprises one or more registers for delaying said forward state metrics.

5. The soft-output detector of claim 1 , wherein each backward state metric represents a best path of length Q leaving a current backward state in a forward direction, where Q is one of N and 2N, and wherein the forward detector uses a radix 2 N trellis with N≧2, where N is a number of received samples.

6. The soft-output detector of claim 1 , wherein log-likelihood ratios are calculated for a symbol using a combined trellis structure that contains all possible values of the symbol, wherein a combined metric for each possible symbol value is calculated by adding a forward state metric, a current branch metric, and a backward state metric and wherein a dependence on parts of the backward state label, current branch label, and forward state label is removed that do not directly map to the symbol value, wherein a hard-decision is the symbol value associated with the best combined metric in a set of combined metrics for all possible symbol values, wherein a magnitude of the log-likelihood ratio for each possible symbol value is obtained by substantially taking a difference between a best combined metric associated with that particular symbol value and a best combined metric in said set of combined metrics for all possible values.

7. The soft-output detector of claim 1 , wherein one or more of a max-log-MAP algorithm, a log-MAP algorithm, a feedback algorithm, and an optimization method is substantially applied piecewise within said forward, backward and current branch detectors and said soft-output detector to remove a dependence on parts of the received signal that are not constrained by backward state labels, forward state labels, and current branch metric labels.

8. The soft-output detector of claim 1 , wherein a soft-output for one of binary and non-binary symbols are mapped from sets of bits constrained by the labels of the combined trellis structure.

9. The soft-output detector of claim 8 , wherein the bits are precoded with 1/(1⊕D) and wherein the log-likelihood ratios are calculated for an unprecoded binary symbol that corresponds to a (1⊕D) mapping of two precoded bits.

10. The soft-output detector of claim 1 , wherein said backward detector has a reduced number of states at some trellis step.

11. A method for processing a received signal using a soft-output detector, comprising:

calculating forward state metrics using a forward detector;

calculating backward state metrics using a backward detector; and

calculating a current branch metric using a current branch detector, wherein at least two of said forward detector, said backward detector and said current branch detector employ trellis structures with a different maximum number of states.

12. The method of claim 11 , wherein the forward detector uses a four state, radix 2 N trellis with or without feedback, where N is a number of received samples.

13. The method of claim 11 , further comprising the step of unraveling said backward state metrics by setting initial backward state metrics to 0 and calculating a best path leaving each current backward state in a forward direction.

14. The method of claim 11 , wherein each backward state metric represents a best path of length Q leaving a current backward state in a forward direction, where Q is one of N and 2N, and wherein the forward detector uses a radix 2 N trellis with N≧2, where N is a number of received samples.

15. The method of claim 11 , wherein said log-likelihood ratios are calculated for a symbol using a combined trellis structure that contains all possible values of the symbol, wherein a combined metric for each possible symbol value is calculated by adding a forward state metric, a current branch metric, and a backward state metric and wherein a dependence on parts of the backward state label, current branch label, and forward state label is removed that do not directly map to the symbol value, wherein a hard-decision is the symbol value associated with the best combined metric in a set of combined metrics for all possible symbol values, wherein a magnitude of the log-likelihood ratio for each possible symbol value is obtained by substantially taking a difference between a best combined metric associated with that particular symbol value and a best combined metric in said set of combined metrics for all possible values.

16. The method of claim 11 , wherein one or more of a max-log-MAP algorithm, a log-MAP algorithm, a feedback algorithm, and an optimization method is substantially applied piecewise within said forward, backward and current branch detectors and said soft-output detector to remove a dependence on parts of the received signal that are not constrained by backward state labels, forward state labels, and current branch metric labels.

17. The method of claim 11 , wherein a soft-output for one of binary and non-binary symbols are mapped from sets of bits that are constrained by labels of the combined trellis structure.

18. The method of claim 17 , wherein the bits are precoded with 1/(1⊕D) and wherein the log-likelihood ratios are calculated for an unprecoded binary symbol that corresponds to a (1⊕D) mapping of two precoded bits.

19. The method of claim 11 , wherein said backward detector has a reduced number of states at some trellis step.

20. The method of claim 11 , further comprising the step of generating one or more log-likelihood ratios for one or more symbols based on said forward state metrics, backward state metrics, and current branch metric.

Assignments (10)
MERGER Recorded Mar 3, 2023
From: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED; BROADCOM INTERNATIONAL PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 062952/0850 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2020
From: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
To: BROADCOM INTERNATIONAL PTE. LTD.
Reel/Frame 053771/0901 →
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT NUMBER 9,385,856 TO 9,385,756 PREVIOUSLY RECORDED AT REEL: 47349 FRAME: 001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
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CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE PREVIOUSLY RECORDED ON REEL 047229 FRAME 0408. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
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MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
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TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
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PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
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TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
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PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
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