Program module applicability analyzer for software development and testing for multi-processor environments

1. A machine-implemented method for programming a heterogeneous multi-processor computer system to run a plurality of program modules, wherein each program module is to be run on one of the processors, the system comprising a plurality of processors of two or more different processor types, the method comprising:

(a) performing machine-implemented offline processing using a program module applicability analyzer (PMAA) and a plurality of SBT tools of a schedule building toolkit (SBT), wherein:

the PMAA determines which processor types are capable of running which program modules;

the PMAA receives information corresponding to memory allocation for the first processor;

the PMAA receives data size requirements for the first program module;

the PMAA computes a total memory requirement for the first program module based on the data size requirements;

the PMAA compares the total memory requirement for the first program module with the memory allocation for the first processor;

the PMAA determines that the first processor cannot run the first program module if the total memory requirement is greater than the memory allocation;

the PMAA receives information corresponding to data transfer capabilities for the first processor;

the PMAA receives data transfer requirements for the first program module;

the PMAA computes an average data transfer utilization for the first program module based on the data transfer requirements;

the PMAA compares the average data transfer utilization for the first program module with the data transfer capabilities for the first processor;

the PMAA determines that the first processor cannot run the first program module if the average data transfer utilization is greater than the data transfer capabilities; and

the plurality of SBT tools comprise:

(i) a schedule builder that selects a subset of one or more different schedule solutions based on a first set of use cases; and

(ii) a source code generator that generates scheduling software for a selected schedule solution, wherein the scheduling software is to be run on one or more of the processors; and

(b) performing machine-implemented online processing using realtime data to test the scheduling software and the selected schedule solution, wherein:

the PMAA determines whether a first processor of a first processor type is capable of running a first program module without compiling the first program module.

2. The method of claim 1 , wherein:

the PMAA receives information corresponding to data transfer capabilities for the first processor;

the PMAA receives data transfer requirements for the first program module;

the PMAA computes an average data transfer utilization for the first program module based on the data transfer requirements;

the PMAA compares the average data transfer utilization for the first program module with the data transfer capabilities for the first processor; and

the PMAA determines that the first processor cannot run the first program module if the average data transfer utilization is greater than the data transfer capabilities.

3. The method of claim 1 , further comprising, after step (a) and before step (b), the step of performing a blackbox simulation to test the scheduling software and the selected schedule solution on a second set of use cases larger than the first set, wherein the plurality of SBT tools further comprise a profiling and modeling code generator that generates software for the blackbox simulation.

4. The method of claim 1 , wherein the plurality of processors comprise at least N 1 processors of a first processor type and N 2 processors of a second processor type different from the first processor type, wherein at least one of N 1 and N 2 is greater than 1.

5. The method of claim 4 , wherein both N 1 and N 2 are greater than 1.

6. The method of claim 1 , wherein at least part of the offline processing of step (a) is repeated after performing the online processing of step (b) to modify one or more of the scheduling software and the selected schedule solution.

7. The method of claim 1 , wherein the PMAA is one of a plurality of SIET tools of a scheduling information extracting toolkit (SIET) wherein:

the plurality of SIET tools further comprise one or more of:

(i) a cycle analyzer that determines timing requirements for each program module running on each capable processor type;

(ii) a dependency analyzer that determines data input and output dependencies between different program modules running on capable processor types; and

(iii) a data exchange analyzer that determines data transfer requirements between different program modules running on capable processor types.

8. The method of claim 1 , wherein the SBT tools further comprise one or more of:

(i) an interconnection optimizer that compares the different schedule solutions corresponding to different possible assignments of the program modules to the processors; and

(ii) a synchronization optimizer that develops a synchronization scheme for the subset of schedule solutions.

9. A machine-implemented method for programming a multi-processor computer system to run a plurality of program modules, wherein each program module is to be run on one of the processors, the system comprising a plurality of processors of two or more different processor types, the method comprising:

(a) performing machine-implemented offline processing using a program module applicability analyzer (PMAA) and a plurality of SBT tools of a schedule building toolkit (SBT), wherein:

the PMAA determines which processor types are capable of running which program modules;

the PMAA determines that the first processor cannot run the first program module if a total memory requirement is greater than a memory allocation;

the PMAA determines that the first processor cannot run the first program module if an average data transfer utilization is greater than data transfer capabilities; and

the plurality of SBT tools comprise:

(i) a schedule builder that selects a subset of one or more different schedule solutions based on a first set of use cases; and

(ii) a source code generator that generates scheduling software for a selected schedule solution, wherein the scheduling software is to be run on one or more of the processors;

(b) performing a blackbox simulation to test the scheduling software and the selected schedule solution on a second set of use cases larger than the first set, wherein the plurality of SBT tools further comprise a profiling and modeling code generator that generates software for the blackbox simulation; and

(c) performing machine-implemented online processing using realtime data to test the scheduling software and the selected schedule solution, wherein:

the PMAA determines whether a first processor of a first processor type is capable of running a first program module without compiling the first program module.

10. The method of claim 9 , wherein:

the PMAA receives information corresponding to memory allocation for the first processor;

the PMAA receives data size requirements for the first program module;

the PMAA computes a total memory requirement for the first program module based on the data size requirements; and

the PMAA compares the total memory requirement for the first program module with the memory allocation for the first processor.

11. The method of claim 10 , wherein:

the PMAA receives information corresponding to data transfer capabilities for the first processor;

the PMAA receives data transfer requirements for the first program module;

the PMAA computes an average data transfer utilization for the first program module based on the data transfer requirements; and

the PMAA compares the average data transfer utilization for the first program module with the data transfer capabilities for the first processor.

12. The method of claim 9 , wherein:

the PMAA receives information corresponding to data transfer capabilities for the first processor;

the PMAA receives data transfer requirements for the first program module;

the PMAA computes an average data transfer utilization for the first program module based on the data transfer requirements;

the PMAA compares the average data transfer utilization for the first program module with the data transfer capabilities for the first processor; and

the PMAA determines that the first processor cannot run the first program module if the average data transfer utilization is greater than the data transfer capabilities.

13. The method of claim 9 , wherein the plurality of processors comprise at least N 1 processors of a first processor type and N 2 processors of a second processor type different from the first processor type, wherein at least one of N 1 and N 2 is greater than 1.

14. The method of claim 13 , wherein both N 1 and N 2 are greater than 1.

15. The method of claim 9 , wherein at least part of the offline processing of step (a) is repeated after performing the online processing of step (b) to modify one or more of the scheduling software and the selected schedule solution.

16. The method of claim 9 , wherein the PMAA is one of a plurality of SIET tools of a scheduling information extracting toolkit (SIET) wherein:

the plurality of SIET tools further comprise one or more of:

(i) a cycle analyzer that determines timing requirements for each program module running on each capable processor type;

(ii) a dependency analyzer that determines data input and output dependencies between different program modules running on capable processor types; and

(iii) a data exchange analyzer that determines data transfer requirements between different program modules running on capable processor types.

17. The method of claim 9 , wherein the SBT tools further comprise one or more of:

(i) an interconnection optimizer that compares the different schedule solutions corresponding to different possible assignments of the program modules to the processors; and

(ii) a synchronization optimizer that develops a synchronization scheme for the subset of schedule solutions.

18. A machine-implemented method for programming a multi-processor computer system to run a plurality of program modules, wherein each program module is to be run on one of the processors, the system comprising a plurality of processors of two or more different processor types, the method comprising:

(a) performing machine-implemented offline processing using a program module applicability analyzer (PMAA) and a plurality of SBT tools of a schedule building toolkit (SBT), wherein:

the PMAA determines which processor types are capable of running which program modules;

the PMAA receives information corresponding to memory allocation for the first processor;

the PMAA receives data size requirements for the first program module;

the PMAA computes a total memory requirement for the first program module based on the data size requirements;

the PMAA compares the total memory requirement for the first program module with the memory allocation for the first processor;

the PMAA determines that the first processor cannot run the first program module if the total memory requirement is greater than the memory allocation;

the PMAA determines that the first processor cannot run the first program module if an average data transfer utilization is greater than data transfer capabilities; and

the plurality of SBT tools comprise:

(i) a schedule builder that selects a subset of one or more different schedule solutions based on a first set of use cases; and

(ii) a source code generator that generates scheduling software for a selected schedule solution, wherein the scheduling software is to be run on one or more of the processors; and

(b) performing machine-implemented online processing using realtime data to test the scheduling software and the selected schedule solution, wherein:

the PMAA determines whether a first processor of a first processor type is capable of running a first program module without compiling the first program module.

19. The method of claim 18 , wherein the plurality of processors comprise at least N 1 processors of a first processor type and N 2 processors of a second processor type different from the first processor type, wherein at least one of N 1 and N 2 is greater than 1.

20. The method of claim 19 , wherein both N 1 and N 2 are greater than 1.