IP Library Granted Patent US 8,760,533
Granted Patent B2
US 8,760,533 · App. 13/899,256 · Granted Jun 24, 2014

Digital image processor for a digital camera

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Quick Facts
Patent No.
US 8,760,533
App. No.
13/899,256
Granted
Jun 24, 2014
Kind
B2
Abstract

A digital camera is disclosed. In an embodiment, the digital camera has an imaging unit including an image sensor and imaging optics and a digital image processor connected to receive raw digital images from the imaging unit and to process the raw digital images. The digital camera also includes a memory configured to store digital image data that has been processed by the digital image processor and a processor configured to direct retrieval of the digital image data that is stored in the memory and the digital image processor is further configured to generate control signals for use in operation of the imaging unit.

Claims (38)

1. A digital camera, the digital camera comprising:

an imaging unit including an image sensor and imaging optics;

a digital image processor connected to receive raw digital images from the imaging unit and to process the raw digital images;

a memory configured to store digital image data that has been processed by the digital image processor;

a microprocessor that is separate from the digital image processor and configured to direct retrieval of the digital image data that is stored in the memory;

wherein the digital image processor is further configured to generate control signals for use in operation of the imaging unit, wherein the control signals comprise at least one of f-stop control signals, shutter control signals, zoom control signals, and focus control signals;

a control bus that connects the imaging unit directly to the digital image processor and wherein the control signals are provided to the imaging unit from the digital image processor via the control bus.

2. The digital camera of claim 1 wherein the control signals comprise f-stop control signals.

3. The digital camera of claim 1 wherein the control signals comprise shutter control signals.

4. The digital camera of claim 1 wherein the control signals comprise zoom control signals.

5. The digital camera of claim 1 wherein the control signals comprise focus control signals.

6. The digital camera of claim 1 further comprising a programmable universal controller, the programmable universal controller having an f-stop signal generator configured to generate f-stop control signals for use in operation of the imaging unit.

7. The digital camera of claim 1 wherein the digital image processor further comprises a programmable universal controller, the programmable universal controller having a shutter timing signal generator configured to generate shutter timing control signals for use in operation of the imaging unit.

8. The digital camera of claim 1 wherein the digital image processor further comprises a programmable universal controller, the programmable universal controller having a zoom signal generator configured to generate zoom control signals for use in operation of the imaging unit.

9. The digital camera of claim 1 wherein the digital image processor further comprises a programmable universal controller, the programmable universal controller having a focus signal generator configured to generate focus control signals for use in operation of the imaging unit.

10. The digital camera of claim 1 wherein the digital image data that has been processed by the digital image processor is directly stored into the memory without further image processing.

11. A digital camera, the digital camera comprising:

an imaging unit including an image sensor and imaging optics;

a digital image processor connected to receive raw digital images from the imaging unit and to process the raw digital images;

a memory configured to store digital image data that has been processed by the digital image processor;

a microprocessor that is separate from the digital image processor and configured to direct retrieval of the digital image data that is stored in the memory;

wherein the digital image processor is further configured to generate timing signals for use in operation of the imaging unit;

wherein the digital image processor further comprises a programmable universal controller having at least one of:

an f-stop signal generator configured to generate f-stop control signals for use in operation of the imaging unit;

a shutter timing signal generator configured to generate shutter control signals for use in operation of the imaging unit;

a zoom signal generator configured to generate zoom control signals for use in operation of the imaging unit; and

a focus signal generator configured to generate focus control signals for use in operation of the imaging unit;

a control bus that connects the imaging unit directly to the digital image processor and wherein at least one of the f-stop control signals, the shutter control signals, the zoom control signals, and the focus control signals is provided to the imaging unit from the digital image processor via the control bus.

12. The digital camera of claim 11 wherein the timing signals comprise pixel clock signals used to synchronize operation of the image sensor.

13. The digital camera of claim 11 wherein the digital image data that has been processed by the digital image processor is directly stored into the memory without further image processing.

14. A digital camera, the digital camera comprising:

an imaging unit including an image sensor, imaging optics, and a stepper motor for controlling the imaging optics;

a digital image processor connected to receive raw digital images from the imaging unit and to process the raw digital images;

a memory configured to store digital image data that has been processed by the digital image processor;

a microprocessor that is separate from the digital image processor and configured to direct retrieval of the digital image data that is stored in the memory;

wherein the digital image processor is further configured to generate stepper control signals that are provided to the stepper motor of the imaging unit.

15. The digital camera of claim 14 further comprising a control bus that connects the imaging unit to the digital image processor and wherein the stepper control signals are provided to the imaging unit from the digital image processor via the control bus.

16. The digital camera of claim 14 further comprising a control bus that directly connects the imaging unit to the digital image processor and wherein the stepper control signals are provided to the imaging unit from the digital image processor via the control bus.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER IN THE INCORRECT US PATENT NO. 8,876,094 PREVIOUSLY RECORDED ON REEL 047351 FRAME 0384. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 8, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 049248/0558 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF THE MERGER PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0910. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047351/0384 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0910 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032851-0001) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 037689/0001 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032851/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 15, 2014
From: SAFAI, MOHAMMAD A.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 032677/0519 →