System for retaining state data
According to one embodiment, a system for retaining M bits of state data of an integrated circuit during power down includes M serially coupled scan flip flops divided into M/N groups, where the M scan flip flops are able to save/restore the M bits of state data. Each group contains a merged scan flip flop coupled to a series of scan flip flops. The merged scan flip flop in each of the groups is coupled to a respective read port of a memory unit, and a final scan flip flop in each of the groups is coupled to a respective write port of the memory unit. The system enables the memory unit to save the M bits of state data in N clock cycles. Each merged scan flip flop has a read select input that enables restoring of the state data into the M scan flip flops in N clock cycles.
1. A system comprising:
a plurality of flip flops containing state data of an integrated circuit, said plurality of flip flops being divided into groups, each of said groups containing a merged flip flop;
said merged flip flop in each of said groups being coupled to a respective read port of a memory unit, said memory unit saving said state data in a power saving mode of said integrated circuit.
2. The system of claim 1 wherein a flip flop in each of said groups is coupled to a respective write port of said memory unit.
3. The system of claim 1 wherein said system enables said memory unit to save said state data in N clock cycles.
4. The system of claim 2 wherein said system enables said memory unit to save said state data in N clock cycles.
5. The system of claim 1 wherein said system enables said memory unit to restore said state data to said plurality of flip flops in N clock cycles.
6. The system of claim 1 wherein said plurality of flip flops are serially coupled.
7. The system of claim 1 wherein said plurality of flip flops are scan flip flops.
8. The system of claim 1 wherein said merged flip flop is a merged scan flip flop.
9. The system of claim 6 wherein said serially coupled flip flops are powered by a first power supply and wherein said memory unit is powered by a second power supply.
10. The system of claim 6 wherein said serially coupled flip flops are situated in said integrated circuit.
11. The system of claim 1 wherein each of said plurality of flip flops is a scan flip flop, and each of said plurality of flip flops includes a scan input and a scan output.
12. The system of claim 1 wherein said memory unit is a static random access memory (“SRAM”).
13. The system of claim 1 wherein said system is controlled by a standby signal.
14. The system of claim 1 wherein said integrated circuit is a CPU situated in a portable electronic device.
15. The system of claim 14 wherein said portable electronic device is selected from the group consisting of a cellular telephone, a personal digital assistant (“PDA”), a laptop computer, an MP3 player, and a digital camera.
16. A system comprising:
a plurality of flip flops containing state data of an integrated circuit, said plurality of flip flops being divided into groups, each of said groups containing a merged flip flop;
said merged flip flop in each of said groups being coupled to a respective read port of a memory unit, said memory unit saving said state data in a power saving mode of said integrated circuit;
wherein said plurality of flip flops are powered by a first power supply and wherein said memory unit is powered by a second power supply.
17. The system of claim 16 wherein a flip flop in each of said groups is coupled to a respective write port of said memory unit.
18. The system of claim 16 wherein each of said plurality of flip flops is a scan flip flop, and each of said plurality of flip flops includes a scan input and a scan output.
19. The system of claim 16 wherein said integrated circuit is a CPU situated in a portable electronic device.
20. The system of claim 19 wherein said portable electronic device is selected from the group consisting of a cellular telephone, a personal digital assistant (“PDA”), a laptop computer, an MP3 player, and a digital camera.