IP Library Granted Patent US 9,306,511
Granted Patent B2
US 9,306,511 · App. 13/953,955 · Granted Apr 5, 2016

Power amplifier and distributed filter

Inventors: Yut Hoong Chow (Penang, MY); Wen Hue Chiok (Penang, MY); Ray Kooi Tatt Chuah (Penang, MY)
Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
H03F3/193H03F3/211H03H9/70H03H11/34H03F2203/21157H03H7/38H03H11/28H03H2250/00
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Quick Facts
Patent No.
US 9,306,511
App. No.
13/953,955
Granted
Apr 5, 2016
Kind
B2
Abstract

A system comprises a power amplifier configured to amplify an input signal, a splitter configured to split the amplified input signal into a plurality of output signals, a plurality of filters configured to filter the plurality of output signals, respectively, to produce a plurality of filtered output signals, and a combiner configured to combine the filtered output signals to produce a combined output signal.

Claims (28)

1. A system, comprising:

a power amplifier configured to amplify an input signal;

a splitter configured to split the amplified input signal into a plurality of output signals;

a plurality of filters configured to filter the plurality of output signals, respectively, to produce a plurality of filtered output signals; and

a combiner configured to combine the filtered output signals to produce a combined output signal, wherein the power amplifier outputs the plurality of output signals via a plurality of output ports, respectively; and

a plurality of input impedance matching circuits configured to match respective input impedances of the plurality of filters to respective output impedances of the plurality of output ports.

2. The system of claim 1 , wherein each of the plurality of filters comprises an acoustic resonator.

3. The system of claim 2 , wherein each of the acoustic resonators is a film bulk acoustic resonator (FBAR), a stacked bulk acoustic resonator (SBAR), a double bulk acoustic resonator (DBAR), a surface acoustic wave (SAW) resonator, or a bulk acoustic wave (BAW) resonator.

4. The system of claim 1 , further comprising a plurality of output impedance matching circuits configured to match respective output impedances of the plurality of filters to an input impedance of a device receiving the combined output signal.

5. The system of claim 4 , wherein each of the input impedance matching circuits and each of the output impedance matching circuits comprises an inductance-capacitance (LC) circuit.

6. The system of claim 1 , wherein the power amplifier comprises a plurality of field effect transistors (FETs) each having a gate receiving the input signal and a drain transmitting one of the plurality of output signals.

7. The system of claim 6 , wherein the power amplifier comprises a plurality of gain stages arranged in a sequence, and the plurality of FETs are located in an output stage of the sequence.

8. The system of claim 7 , wherein the splitter is located within the power amplifier between two of the sequential gain stages.

9. The system of claim 6 , wherein each of the plurality of FETs comprises a gallium arsenide (GaAs) pseudomorphic high electron mobility (pHEMT) transistor.

10. The system of claim 2 , wherein the combiner comprises a plurality of transmission lines, and each of the acoustic resonators is connected to at least one helper inductor.

11. The system of claim 1 , wherein the splitter is coupled to a plurality of transmission lines each coupled to one of the acoustic resonators.

12. The system of claim 1 wherein the input signal is a radio frequency (RF) signal or microwave frequency signal.

13. A method, comprising:

amplifying an input signal;

splitting the amplified input signal into a plurality of output signals;

filtering the plurality of output signals, respectively, to produce a plurality of filtered output signals; and

combining the filtered output signals to produce a combined, output signal, wherein the power amplifier outputs the plurality of output signals via a plurality of output ports, respectively; and

operating a plurality of input impedance matching circuits to match respective input impedances of the plurality of filters to respective output impedances of the plurality of output ports.

14. The method of claim 13 , wherein each of the plurality of filters comprises an acoustic resonator.

15. The method of claim 14 , wherein each of the acoustic resonators is a film bulk acoustic resonator (FBAR), a stacked bulk acoustic resonator (SBAR), or a double bulk acoustic resonator (DBAR), a surface acoustic wave (SAW) resonator, or a bulk acoustic wave (BAW) resonator.

16. The method of claim 13 , further comprising operating a plurality of output impedance matching circuits to match respective output impedances of the plurality of filters to an input impedance of a device receiving the combined output signal.

17. The method of claim 16 , wherein each of the input impedance matching circuits and each of the output impedance matching circuits comprises an inductance-capacitance (LC) circuit.

18. The method of claim 13 , Wherein the power amplifier comprises a plurality of field effect transistors (FETs) each having as gate receiving the input signal and a drain transmitting one of the plurality of output signals, wherein the plurality of FETs are arranged in parallel in an output stage of the power amplifier.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047422 FRAME: 0464. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0702 →
MERGER Recorded Oct 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047422/0464 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032851-0001) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 037689/0001 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032851/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 30, 2013
From: CHOW, YUT HOONG; CHIOK, WEN HUE; CHUAH, RAY KOOI TATT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 030920/0141 →
Continuity (1)
Related Publication 20150035599A1 · Feb 5, 2015