IP Library Granted Patent US 9,101,056
Granted Patent B2
US 9,101,056 · App. 14/012,240 · Granted Aug 4, 2015

Imprinted bi-layer micro-structure method with bi-level stamp

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Quick Facts
Patent No.
US 9,101,056
App. No.
14/012,240
Granted
Aug 4, 2015
Kind
B2
Abstract

A method of making an imprinted micro-wire structure includes providing a substrate having an edge area and a central area separate from the edge area and providing a first stamp and a multi-level second stamp. A curable bottom layer and multi-layer are provided on the substrate. A bottom-layer micro-channel is imprinted in the bottom layer. A multi-layer micro-channel and a top-layer micro-channel are imprinted in the multi-layer. Micro-wires are formed in each micro-channel. The bottom-layer micro-wire extends from the central area into the edge area. The multi-layer micro-wire contacts the bottom-layer micro-wire in the edge area. The top-layer micro-wire is over the central area and is separate from the multi-layer micro-wire and the bottom-layer micro-channel. The bottom-layer micro-wire is electrically connected to the multi-layer micro-wire and is electrically isolated from the top-layer micro-wire.

Claims (58)

1. A method of making a micro-wire structure, comprising:

providing a substrate having an edge area and a central area separate from the edge area;

providing a first stamp and a multi-level second stamp;

providing a curable bottom layer in relation to the substrate;

forming an imprinted bottom-layer micro-channel in the curable bottom layer by at least imprinting the curable bottom layer with the first stamp in at least a portion of the central area and in at least a portion of the edge area and curing the curable bottom layer, the bottom-layer micro-channel extending from the central area into the edge area;

locating a curable electrical conductor in the bottom-layer micro-channel and curing the curable electrical conductor to form a bottom-layer micro-wire in the bottom-layer micro-channel, the bottom-layer micro-wire extending from the central area into the edge area;

providing a curable multi-layer adjacent to and in contact with the cured bottom layer and the bottom-layer micro-wire, the curable multi-layer including a connecting layer formed over the cured bottom layer and a top layer formed over the connecting layer on a side of the connecting layer opposite the bottom layer;

forming an imprinted multi-layer micro-channel in the top layer and the connecting layer of the curable multi-layer over at least a portion of the bottom-layer micro-channel in at least a portion of the edge area and forming an imprinted top-layer micro-channel in the top layer of the curable multi-layer separate from the bottom-layer micro-channel and over at least a portion of the bottom-layer micro-channel in at least a portion of the central area by at least imprinting the curable multi-layer with the multi-level stamp and curing the curable multi-layer so that the bottom-layer micro-channel is beneath the multi-layer micro-channel in the edge area and is also beneath the top-layer micro-channel in the central area;

forming a multi-layer micro-wire in the multi-layer micro-channel contacting at least a portion of the bottom-layer micro-wire and forming a top-layer micro-wire in the top-layer micro-channel that is electrically isolated from the multi-layer micro-wire and the bottom-layer micro-wire; and

wherein the bottom-layer micro-wire in the central area is electrically connected to the multi-layer micro-wire in the edge area and is electrically isolated from the top-layer micro-wire.

2. The method of claim 1 , wherein the substrate has at least one edge and the edge area is adjacent to the edge.

3. The method of claim 1 , wherein the step of forming the imprinted multi-layer micro-channel further includes contacting the bottom-layer micro-wire with the multi-level stamp.

4. The method of claim 1 , wherein the bottom and multi- layers include cross-linkable material and further including cross linking the cross-linkable bottom-layer material to the cross-linkable multi-layer material.

5. The method of claim 1 , wherein the curable bottom layer includes first curable material and further including locating the first stamp in contact with the first curable material and only partially curing the first curable material, wherein the curable multi-layer includes second curable material and further including locating the multi-level stamp in contact with the second curable material, and at least partially curing both the first curable material and the second curable material in a common step.

6. The method of claim 1 , wherein a portion of the multi-layer micro-wire forms at least a portion of a connection pad.

7. The method of claim 6 , wherein the connection pad further includes a plurality of micro-wires.

8. The method of claim 1 , further including forming a plurality of multi-layer micro-wires electrically connected to a corresponding plurality of bottom-layer micro-wires.

9. The method of claim 8 , further including forming a plurality of top-layer micro-wires electrically isolated from the multi-layer micro-wires.

10. The method of claim 1 , further including removing a portion of the cured multi-layer.

11. The method of claim 10 , further including removing the portion of the cured multi-layer by treating the cured multi-layer with a plasma treatment.

12. The method of claim 10 , further including thinning the cured multi-layer by a thinning depth.

13. The method of claim 12 , wherein the thinning depth is less than the difference between the depth of the cured multi-layer and the depth of any micro-channels in the cured multi-layer.

14. A method of making a micro-wire structure, comprising:

providing a substrate having an edge area and a central area separate from the edge area;

providing a first stamp and a multi-level second stamp;

providing a curable bottom layer in relation to the substrate;

forming an imprinted bottom-layer micro-channel in the curable bottom layer by at least imprinting the curable bottom layer with the first stamp in at least a portion of the central area and in at least a portion of the edge area and curing the curable bottom layer, the bottom-layer micro-channel extending from the central area into the edge area;

locating a curable electrical conductor in the bottom-layer micro-channel and curing the curable electrical conductor to form a bottom-layer micro-wire in the bottom-layer micro-channel, the bottom-layer micro-wire extending from the central area into the edge area;

providing a curable multi-layer adjacent to and in contact with the cured bottom layer and the bottom-layer micro-wire;

forming an imprinted multi-layer micro-channel in the curable multi-layer over at least a portion of the bottom-layer micro-channel in at least a portion of the edge area and forming an imprinted top-layer micro-channel in the curable multi-layer separate from the bottom-layer micro-channel and over at least a portion of the bottom-layer micro-channel in at least a portion of the central area by at least imprinting the curable multi-layer with the multi-level stamp and curing the curable multi-layer;

forming a multi-layer micro-wire in the multi-layer micro-channel contacting at least a portion of the bottom-layer micro-wire and forming a top-layer micro-wire in the top-layer micro-channel that is electrically isolated from the multi-layer micro-wire and the bottom-layer micro-wire; and

wherein the bottom-layer micro-wire in the central area is electrically connected to the multi-layer micro-wire in the edge area and is electrically isolated from the top-layer micro-wire; and

further including depositing first conductive ink in the bottom-layer micro-channel and at least partially curing the first conductive ink, further including depositing second conductive ink in the connecting-layer micro-channel and the edge micro-channel and at least partially curing the first conductive and second conductive ink in a common step.

15. The method of claim 14 , wherein the first and second conductive inks include electrically conductive particles and further including sintering, welding, or agglomerating electrically conductive particles in the second conductive ink to electrically conductive particles in the first conductive ink.

16. A method of making a micro-wire structure, comprising:

providing a substrate having an edge area and a central area separate from the edge area;

providing a first stamp and a multi-level second stamp;

providing a curable bottom layer in relation to the substrate;

forming an imprinted bottom-layer micro-channel in the curable bottom layer by at least imprinting the curable bottom layer with the first stamp in at least a portion of the central area and in at least a portion of the edge area and curing the curable bottom layer, the bottom-layer micro-channel extending from the central area into the edge area;

locating a curable electrical conductor in the bottom-layer micro-channel and curing the curable electrical conductor to form a bottom-layer micro-wire in the bottom-layer micro-channel, the bottom-layer micro-wire extending from the central area into the edge area;

providing a curable multi-layer adjacent to and in contact with the cured bottom layer and the bottom-layer micro-wire;

forming an imprinted multi-layer micro-channel in the curable multi-layer over at least a portion of the bottom-layer micro-channel in at least a portion of the edge area and forming an imprinted top-layer micro-channel in the curable multi-layer separate from the bottom-layer micro-channel and over at least a portion of the bottom-layer micro-channel in at least a portion of the central area by at least imprinting the curable multi-layer with the multi-level stamp and curing the curable multi-layer;

forming a multi-layer micro-wire in the multi-layer micro-channel contacting at least a portion of the bottom-layer micro-wire and forming a top-layer micro-wire in the top-layer micro-channel that is electrically isolated from the multi-layer micro-wire and the bottom-layer micro-wire;

forming a plurality of multi-layer micro-wires electrically connected to a corresponding plurality of bottom-layer micro-wires, forming a plurality of top-layer micro-wires electrically isolated from the multi-layer micro-wires; and

wherein the bottom-layer micro-wire in the central area is electrically connected to the multi-layer micro-wire in the edge area and is electrically isolated from the top-layer micro-wire and wherein the top-layer micro-wires and the bottom-layer micro-wires form a two-dimensional array of overlapping micro-wires.

17. A method of making a micro-wire structure, comprising:

providing a substrate having an edge area and a central area separate from the edge area;

providing a first stamp and a multi-level second stamp;

providing a curable bottom layer in relation to the substrate;

forming an imprinted bottom-layer micro-channel in the curable bottom layer by at least imprinting the curable bottom layer with the first stamp in at least a portion of the central area and in at least a portion of the edge area and curing the curable bottom layer, the bottom-layer micro-channel extending from the central area into the edge area;

locating a curable electrical conductor in the bottom-layer micro-channel and curing the curable electrical conductor to form a bottom-layer micro-wire in the bottom-layer micro-channel, the bottom-layer micro-wire extending from the central area into the edge area;

providing a curable multi-layer adjacent to and in contact with the cured bottom layer and the bottom-layer micro-wire;

forming an imprinted multi-layer micro-channel in the curable multi-layer over at least a portion of the bottom-layer micro-channel in at least a portion of the edge area and forming an imprinted top-layer micro-channel in the curable multi-layer separate from the bottom-layer micro-channel and over at least a portion of the bottom-layer micro-channel in at least a portion of the central area by at least imprinting the curable multi-layer with the multi-level stamp and curing the curable multi-layer;

forming a multi-layer micro-wire in the multi-layer micro-channel contacting at least a portion of the bottom-layer micro-wire and forming a top-layer micro-wire in the top-layer micro-channel that is electrically isolated from the multi-layer micro-wire and the bottom-layer micro-wire;

forming a plurality of multi-layer micro-wires electrically connected to a corresponding plurality of bottom-layer micro-wires and forming a plurality of top-layer micro-wires electrically isolated from the multi-layer micro-wires; and

wherein the bottom-layer micro-wire in the central area is electrically connected to the multi-layer micro-wire in the edge area and is electrically isolated from the top-layer micro-wire and wherein the substrate has at least first and second edges and at least some of the plurality of multi-layer micro-wires are located in an edge area adjacent to the first edge and at least some of the plurality of top-layer micro-wires extend into a second edge area adjacent to the second edge and separate from the central area.

18. The method of claim 17 , wherein the multi-layer micro-wires are in the edge area and the top-layer micro-wires extend into the edge area.

19. The method of claim 18 , wherein portions of the top-layer micro-wires are interdigitated between the multi-layer micro-wires in the edge area.

Assignments (11)
NOTICE OF SECURITY INTERESTS Recorded Mar 4, 2021
From: EASTMAN KODAK COMPANY
To: BANK OF AMERICA, N.A., AS AGENT
Reel/Frame 056984/0001 →
INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Mar 4, 2021
From: EASTMAN KODAK COMPANY
To: ALTER DOMUS (US) LLC
Reel/Frame 056734/0233 →
INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Mar 4, 2021
From: EASTMAN KODAK COMPANY
To: ALTER DOMUS (US) LLC
Reel/Frame 056734/0001 →
INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Mar 4, 2021
From: EASTMAN KODAK COMPANY
To: ALTER DOMUS (US) LLC
Reel/Frame 056733/0681 →
RELEASE OF SECURITY INTEREST Recorded Jan 24, 2020
From: BARCLAYS BANK PLC
To: EASTMAN KODAK COMPANY; FAR EAST DEVELOPMENT LTD.; FPC INC.; KODAK (NEAR EAST) INC.; KODAK AMERICAS LTD.; KODAK REALTY INC.; LASER PACIFIC MEDIA CORPORATION; QUALEX INC.; KODAK PHILIPPINES LTD.; NPEC INC.
Reel/Frame 052773/0001 →
RELEASE OF SECURITY INTEREST Recorded Jul 30, 2019
From: JP MORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: EASTMAN KODAK COMPANY; FAR EAST DEVELOPMENT LTD.; PFC, INC.; KODAK (NEAR EAST), INC.; KODAK AMERICAS, LTD.; KODAK IMAGING NETWORK, INC.; KODAK PORTUGUESA LIMITED; KODAK REALTY, INC.; LASER PACIFIC MEDIA CORPORATION; PAKON, INC.; QUALEX, INC.; KODAK PHILIPPINES, LTD.; NPEC, INC.; CREO MANUFACTURING AMERICA LLC; KODAK AVIATION LEASING LLC
Reel/Frame 049901/0001 →
RELEASE OF SECURITY INTEREST Recorded Jul 22, 2019
From: JP MORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: EASTMAN KODAK COMPANY; FAR EAST DEVELOPMENT LTD.; FPC, INC.; KODAK (NEAR EAST), INC.; KODAK AMERICAS, LTD.; KODAK IMAGING NETWORK, INC.; KODAK PORTUGUESA LIMITED; KODAK REALTY, INC.; LASER PACIFIC MEDIA CORPORATION; PAKON, INC.; QUALEX, INC.; KODAK PHILIPPINES, LTD.; NPEC, INC.; CREO MANUFACTURING AMERICA LLC; KODAK AVIATION LEASING LLC
Reel/Frame 050239/0001 →
INTELLECTUAL PROPERTY SECURITY AGREEMENT (ABL) Recorded Sep 5, 2013
From: EASTMAN KODAK COMPANY; FAR EAST DEVELOPMENT LTD.; FPC INC.; KODAK (NEAR EAST), INC.; KODAK AMERICAS, LTD.; KODAK IMAGING NETWORK, INC.; KODAK PORTUGUESA LIMITED; KODAK REALTY, INC.; LASER-PACIFIC MEDIA CORPORATION; PAKON, INC.; QUALEX INC.; KODAK PHILIPPINES, LTD.; NPEC INC.; CREO MANUFACTURING AMERICA LLC; KODAK AVIATION LEASING LLC
To: BANK OF AMERICA N.A., AS AGENT
Reel/Frame 031162/0117 →
INTELLECTUAL PROPERTY SECURITY AGREEMENT (SECOND LIEN) Recorded Sep 5, 2013
From: EASTMAN KODAK COMPANY; FAR EAST DEVELOPMENT LTD.; FPC INC.; KODAK (NEAR EAST), INC.; KODAK AMERICAS, LTD.; KODAK IMAGING NETWORK, INC.; KODAK PORTUGUESA LIMITED; KODAK REALTY, INC.; LASER-PACIFIC MEDIA CORPORATION; PAKON, INC.; QUALEX INC.; KODAK PHILIPPINES, LTD.; NPEC INC.; CREO MANUFACTURING AMERICA LLC; KODAK AVIATION LEASING LLC
To: BARCLAYS BANK PLC, AS ADMINISTRATIVE AGENT
Reel/Frame 031159/0001 →
INTELLECTUAL PROPERTY SECURITY AGREEMENT (FIRST LIEN) Recorded Sep 5, 2013
From: EASTMAN KODAK COMPANY; FAR EAST DEVELOPMENT LTD.; FPC INC.; KODAK (NEAR EAST), INC.; KODAK IMAGING NETWORK, INC.; KODAK PORTUGUESA LIMITED; KODAK REALTY, INC.; LASER-PACIFIC MEDIA CORPORATION; PAKON, INC.; QUALEX INC.; KODAK PHILIPPINES, LTD.; NPEC INC.; CREO MANUFACTURING AMERICA LLC; KODAK AVIATION LEASING LLC; KODAK AMERICAS, LTD.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE
Reel/Frame 031158/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2013
From: COK, RONALD STEVEN
To: EASTMAN KODAK COMPANY
Reel/Frame 031106/0197 →