IP Library Granted Patent US 8,861,122
Granted Patent B1
US 8,861,122 · App. 14/108,282 · Granted Oct 14, 2014

Systems and methods for sync mark based read offset detection

Inventors: Eui Seok Hwang (San Jose, CA); Richard Rauschmayer (Longmont, CO)
Assignee: LSI Corporation
G11B5/59616
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Quick Facts
Patent No.
US 8,861,122
App. No.
14/108,282
Granted
Oct 14, 2014
Kind
B1
Abstract

A data processing system includes a cross-correlation calculator operable to calculate cross-correlations between an input signal and each of three different sync patterns associated with a target track and neighboring tracks, a detector operable to select a largest of the cross-correlations, a threshold comparator operable to compare the cross-correlations with a threshold to determine a direction of any position error of a read head, and a position error estimator operable to estimate a position error of the read head based at least in part on the cross-correlations.

Claims (34)

1. A data processing system comprising:

a cross-correlation calculator operable to calculate cross-correlations between an input signal and each of three different sync patterns associated with a target track and neighboring tracks;

a detector operable to select a largest of the cross-correlations;

a threshold comparator operable to compare the cross-correlations with a threshold to determine a direction of any position error of a read head; and

a position error estimator operable to estimate a position error of the read head based at least in part on the cross-correlations.

2. The data processing system of claim 1 , wherein the position error estimator is further operable to estimate a write phase offset based at least in part on delay indices of the cross-correlations from the cross-correlation calculator.

3. The data processing system of claim 2 , wherein the position error comprises a cross-track position error and the write phase offset comprises a down-track shift between the target track and at least one of the neighboring tracks.

4. The data processing system of claim 1 , wherein the cross-correlation calculator is operable to calculate the cross-correlations by identifying a largest cross-correlation within a search window between the input signal and each of the three different sync patterns.

5. The data processing system of claim 1 , wherein the three different sync patterns are at least substantially orthogonal to each other.

6. The data processing system of claim 1 , wherein the three different sync patterns are at least substantially orthogonal to a preamble pattern on the target track and the neighboring tracks and to user data on the target track and the neighboring tracks.

7. The data processing system of claim 1 , wherein the position error estimator is operable to estimate the position error as zero when the cross-correlations of the neighboring tracks are below the threshold.

8. The data processing system of claim 1 , wherein when the cross-correlation of one of the neighboring tracks is above the threshold and the cross-correlation of another of the neighboring tracks is below the threshold, the position error estimator is operable to estimate the position error based on the cross-correlation of the neighboring track which is greater than the threshold, divided by the cross-correlation of the target track plus the cross-correlation of the neighboring track which is greater than the threshold.

9. The data processing system of claim 1 , wherein when the cross-correlation of one of the neighboring tracks is above the threshold and the cross-correlation of another of the neighboring tracks is below the threshold, the position error estimator is operable to estimate the write phase offset based on a difference between the delay indices of the cross-correlation of the target track and the cross-correlation of the neighboring track which is greater than the threshold.

10. The data processing system of claim 1 , wherein when the cross-correlations of both of the neighboring tracks are above the threshold, the position error estimator is operable to estimate the position error based on a difference between the cross-correlations of the neighboring tracks, divided by a sum of the cross-correlations of the target track and of the neighboring tracks.

11. The data processing system of claim 1 , wherein when the cross-correlations of both of the neighboring tracks are above the threshold, the position error estimator is operable to estimate the write phase offsets between the target track and each of the neighboring tracks based on differences between the delay indices of the cross-correlation of the target track and the cross-correlations of the neighboring tracks.

12. A method for estimating a cross-track read head position errors, comprising:

calculating cross-correlations between a readback signal and each of three sync patterns associated with a target track and two neighboring tracks within a search window;

identifying a maximum cross-correlation for each of the three sync patterns and a delay index at which each of the maximum cross-correlations occur within the search window;

selecting a largest of the three maximum cross-correlations as a target track cross-correlation; and

estimating the cross-track read head position error based at least in part on the three maximum cross-correlations.

13. The method of claim 12 , further comprising comparing the cross-correlations of the two neighboring tracks with a threshold.

14. The method of claim 13 , wherein when the cross-correlations of the two neighboring tracks are both lower than the threshold, the cross-track read head position error is estimated to be zero.

15. The method of claim 13 , wherein when the cross-correlation of one of the two neighboring tracks is higher than the threshold and another of the two neighboring tracks is higher than the threshold, the cross-track read head position error is estimated based on the cross-correlation of the neighboring track which is greater than the threshold, divided by the cross-correlation of the target track plus the cross-correlation of the neighboring track which is greater than the threshold.

16. The method of claim 15 , wherein when the cross-correlation of one of the two neighboring tracks is higher than the threshold and another of the two neighboring tracks is higher than the threshold, a write phase offset is estimated based on a difference between the delay indices of the cross-correlation of the target track and the cross-correlation of the neighboring track which is greater than the threshold.

17. The method of claim 13 , wherein when the cross-correlations of both of the two neighboring tracks are higher than the threshold, the cross-track read head position error is estimated based on a difference between the cross-correlations of the neighboring tracks, divided by a sum of the cross-correlations of the target track and of the neighboring tracks.

18. The method of claim 13 , wherein when the cross-correlations of both of the two neighboring tracks are higher than the threshold, write phase offsets between the target track and each of the neighboring tracks are estimated based on differences between the delay indices of the cross-correlation of the target track and the cross-correlations of the neighboring tracks.

19. The method of claim 12 , further comprising interpolating between the maximum cross-correlations to yield interpolated maximum cross-correlations and estimating a write phase offset based at least in part on the interpolated maximum cross-correlations.

20. A data storage device, comprising:

a storage medium;

a read head disposed in relation to the storage medium operable to yield an analog signal;

an analog to digital converter circuit operable to produce digital samples from the analog signal;

an equalizer operable to filter the digital samples to yield an equalized output;

a detector/decoder circuit operable to process the equalized output to identify original values of the equalized output as written to the storage medium; and

a position error estimator operable to calculate cross-correlation values between a readback signal derived from the digital samples and each of three different sync patterns, to select between a plurality of position error cases, and to estimate a position error based at least in part on the cross-correlation values and a selected one of the position error cases.

Assignments (11)
MERGER Recorded Mar 3, 2023
From: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED; BROADCOM INTERNATIONAL PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 062952/0850 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2020
From: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
To: BROADCOM INTERNATIONAL PTE. LTD.
Reel/Frame 053771/0901 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER IN THE INCORRECT US PATENT NO. 8,876,094 PREVIOUSLY RECORDED ON REEL 047351 FRAME 0384. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 8, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 049248/0558 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF THE MERGER PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0910. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047351/0384 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0910 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2013
From: HWANG, EUI SEOK; RAUSCHMAYER, RICHARD
To: LSI CORPORATION
Reel/Frame 031803/0571 →
Continuity (1)
Provisional Application 61916199 · Dec 14, 2013