IP Library Granted Patent US 9,026,687
Granted Patent B1
US 9,026,687 · App. 14/140,669 · Granted May 5, 2015

Host based enumeration and configuration for computer expansion bus controllers

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Quick Facts
Patent No.
US 9,026,687
App. No.
14/140,669
Granted
May 5, 2015
Kind
B1
Abstract

A controller includes a communications interface configured to communicatively couple a host to a computer expansion bus configured to perform peripheral device enumeration and configuration. The computer expansion bus is configured to communicatively couple the host to a peripheral device. The controller also includes a processor configured to facilitate enumeration and configuration by the host of the peripheral device. The controller further includes a memory having computer executable instructions stored thereon. The computer executable instructions are configured for execution by the processor to facilitate enumeration and configuration of a topology associated with the communicative coupling between the host and the peripheral device, where the topology is enumerated and configured by the host.

Claims (29)

1. A controller comprising:

a communications interface configured to communicatively couple a host to a computer expansion bus configured to perform peripheral device enumeration and configuration, the computer expansion bus configured to communicatively couple the host to a peripheral device;

a processor configured to facilitate enumeration and configuration by the host of the peripheral device; and

a memory having computer executable instructions stored thereon, the computer executable instructions configured for execution by the processor to facilitate enumeration and configuration of a topology associated with the communicative coupling between the host and the peripheral device, wherein the topology is enumerated and configured by the host,

wherein facilitating enumeration and configuration of the topology associated with the communicative coupling between the host and the peripheral device comprises responding to a query received from the host regarding whether the controller supports host based enumeration and configuration of the peripheral device.

2. The controller as recited in claim 1 , wherein the computer expansion bus is configured to communicatively couple the host to the peripheral device using a switch that implements a peripheral component interconnect express (PCIe) standard.

3. The controller as recited in claim 2 , wherein enumeration and configuration of the topology associated with the communicative coupling between the host and the peripheral device comprises enumeration and configuration of a PCIe discovery tree.

4. The controller as recited in claim 1 , wherein the host is communicatively coupled to the peripheral device using at least one of a serial attached small computer system interface (SAS) protocol, a serial advanced technology attachment (SATA) protocol, a redundant array of independent disks (RAID) standard, or a fibre channel (FC) protocol.

5. The controller as recited in claim 1 , wherein facilitating enumeration and configuration of the topology associated with the communicative coupling between the host and the peripheral device comprises creating a device identifier for the peripheral device.

6. The controller as recited in claim 1 , wherein facilitating enumeration and configuration of the topology associated with the communicative coupling between the host and the peripheral device comprises reporting a topology associated with a plurality of ports of the computer expansion bus.

7. The controller as recited in claim 1 , wherein facilitating enumeration and configuration of the topology associated with the communicative coupling between the host and the peripheral device comprises receiving a configuration read passthrough message, and facilitating exploration of a domain associated with the computer expansion bus.

8. The controller as recited in claim 7 , wherein the exploration of the domain associated with the computer expansion bus comprises a depth first search.

9. A non-transitory computer-readable storage medium having computer executable instructions configured to facilitate enumeration and configuration by a host of a peripheral device, the computer executable instructions comprising:

causing a processor included in a controller communicatively coupling a host to a computer expansion bus configured to perform peripheral device enumeration and configuration to respond to a query received from the host regarding whether the controller supports host based enumeration and configuration of a peripheral device communicatively coupled to the host via the computer expansion bus;

causing the processor to create a device identifier for the peripheral device; and

causing the processor to report a topology associated with a plurality of ports of the computer expansion bus.

10. The non-transitory computer-readable storage medium as recited in claim 9 , wherein causing the processor to report a topology associated with a plurality of ports of the computer expansion bus comprises a host based enumeration port event.

11. The non-transitory computer-readable storage medium as recited in claim 9 , wherein the computer executable instructions further comprise causing the processor to initiate a host based enumeration action reply in response to a host based enumeration action request.

12. The non-transitory computer-readable storage medium as recited in claim 9 , wherein the computer executable instructions further comprise receiving a configuration read passthrough message, and facilitating exploration of a domain associated with the computer expansion bus.

13. A controller comprising:

a communications interface configured to communicatively couple a host to a computer expansion bus, the computer expansion bus configured to communicatively couple the host to a peripheral device using a switch that implements a peripheral component interconnect express (PCIe) standard;

a processor configured to facilitate enumeration and configuration by the host of the peripheral device; and

a memory having computer executable instructions stored thereon, the computer executable instructions configured for execution by the processor to facilitate enumeration and configuration of a PCIe discovery tree associated with the communicative coupling between the host and the peripheral device, wherein the PCIe discovery tree is enumerated and configured by the host,

wherein facilitating enumeration and configuration of the PCIe discovery tree associated with the communicative coupling between the host and the peripheral device comprises responding to a query received from the host regarding whether the controller supports host based enumeration and configuration of the peripheral device.

14. The controller as recited in claim 13 , wherein the host is communicatively coupled to the peripheral device using at least one of a serial attached small computer system interface (SAS) protocol, a serial advanced technology attachment (SATA) protocol, a redundant array of independent disks (RAID) standard, or a fibre channel (FC) protocol.

15. The controller as recited in claim 13 , wherein facilitating enumeration and configuration of the PCIe discovery tree associated with the communicative coupling between the host and the peripheral device comprises creating a device identifier for the peripheral device.

16. The controller as recited in claim 13 , wherein facilitating enumeration and configuration of the PCIe discovery tree associated with the communicative coupling between the host and the peripheral device comprises reporting a topology associated with a plurality of ports of the computer expansion bus.

17. The controller as recited in claim 13 , wherein facilitating enumeration and configuration of the PCIe discovery tree associated with the communicative coupling between the host and the peripheral device comprises receiving a configuration read passthrough message, and facilitating exploration of a domain associated with the computer expansion bus.

18. The controller as recited in claim 17 , wherein the exploration of the domain associated with the computer expansion bus comprises a depth first search.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE OF THE MERGER PREVIOUSLY RECORDED ON REEL 047642 FRAME 0417. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT, Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048521/0395 →
MERGER Recorded Oct 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047642/0417 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 26, 2013
From: GOVANDE, NILESH S.; SINGH, RAJENDRA
To: LSI CORPORATION
Reel/Frame 031847/0929 →