IP Library Granted Patent US 8,792,198
Granted Patent B1
US 8,792,198 · App. 14/141,682 · Granted Jul 29, 2014

High impedance low noise cross-coupled amplifier for use in as a preamplifier in a magnetic data storage system

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Quick Facts
Patent No.
US 8,792,198
App. No.
14/141,682
Granted
Jul 29, 2014
Kind
B1
Abstract

A balanced amplifier with a relatively high input impedance with wide bandwidth for use as a fly-height sensor head preamplifier in a magnetic storage read system. The balanced amplifier has two substantially identical halves, each amplifier half having an input transistor, responsive to the input node of the amplifier half disposed in series with a cross-coupling transistor receiving a buffered cross-coupled version of the input signal applied to the other half of the balanced amplifier. Use of cascoded transistors and voltage-followers to limit voltages across various the input and cross-coupling transistors enhance the common mode rejection and power supply rejection ratios of the amplifier while retaining a low high-frequency noise figure similar to low-input impedance balanced amplifier designs.

Claims (34)

1. A balanced amplifier circuit for amplifying an input signal and for providing an output signal, the balanced amplifier circuit comprising:

first and second input signal nodes;

a first amplifier circuit including an input transistor and a cross-coupling transistor, the input transistor having a control terminal connected to the first input signal node, a first output terminal coupled to a first output terminal of the cross-coupling transistor, and a second output terminal coupled to a first power supply node;

a second amplifier circuit including an input transistor and a cross-coupling transistor, the input transistor having a control terminal connected to the first input signal node, a first output terminal coupled to a first output terminal of the cross-coupling transistor, and a second output terminal coupled to the first power supply node;

a first coupling circuit including a capacitor and a coupling transistor, the first coupling circuit being connected such that a control terminal of the coupling transistor is connected to the first input signal node and the capacitor is connected between a first output terminal of the coupling transistor and a control terminal of the cross-coupling transistor of the second amplifier circuit; and

a second coupling circuit including a capacitor and a coupling transistor, the second coupling circuit being connected such that a control terminal of the coupling transistor is connected to the second input signal node and the capacitor is connected between a first output terminal of the coupling transistor and a control terminal of the cross-coupling transistor of the first amplifier circuit.

2. The balanced amplifier of claim 1 wherein the first amplifier further comprises a load resistor coupled between a second output terminal of the cross-coupling transistor and a second power supply node; and wherein the second amplifier further comprises a load resistor coupled between a second output terminal of the cross-coupling transistor and the second power supply node.

3. The balanced amplifier of claim 2 wherein the first amplifier further comprises a cascode device having a control terminal, a first output terminal connected to the second output terminal of the cross-coupling transistor, and a second output terminal connected to the load resistor; and wherein the second amplifier further comprises a cascode device having a control terminal, a first output terminal connected to the second output terminal of the cross-coupling transistor, and a second output terminal connected to the load resistor.

4. The balanced amplifier of claim 1 wherein the first coupling circuit further comprises: a voltage-follower having a control terminal connected to a second output terminal of the coupling transistor in the first coupling circuit, a first output terminal connected to the second output terminal of the input transistor in the first amplifier circuit, and a second output terminal connected to the first power supply node; and wherein the second coupling circuit further comprises: a voltage-follower having a control terminal connected to a second output terminal of the coupling transistor in the second coupling circuit, a first output terminal connected to the second output terminal of the input transistor in the second amplifier circuit, and a second output terminal connected to the first power supply node.

5. The balanced amplifier of claim 1 wherein the first coupling circuit further comprises a current source coupled between the first output terminal of the coupling transistor and the first power supply node, and the second coupling circuit further comprises a current source coupled between the first output terminal of the coupling transistor and the first power supply node.

6. The balanced amplifier of claim 4 wherein, for both of the first and second amplifiers, the second output terminal of the input transistor is a collector of a bipolar transistor of a first conductivity type, the first output terminal of the cross-coupling transistor is a source terminal of an metal-oxide-semiconductor transistor, and the first output terminal of the voltage-follower is an emitter of a bipolar transistor of the first conductivity type; and wherein, for both of the first and second coupling circuits, the first output terminal of the coupling transistor is an emitter of a bipolar transistor of a second conductivity type different from the first conductivity type.

7. The balanced amplifier of claim 3 wherein the first amplifier circuit further comprises a voltage-follower having a control terminal connected to the control terminal of the cascode transistor, a first output terminal connected to a second output terminal of the coupling transistor the first coupling circuit, and a second output terminal coupled to the second power supply node; and wherein the second amplifier circuit further comprises a voltage-follower having a control terminal connected to the control terminal of the cascode transistor, a first output terminal connected to a second output terminal of the coupling transistor of the second coupling circuit, and a second output terminal coupled to the second power supply node.

8. The balanced amplifier of claim 3 wherein the first amplifier further comprises a current source coupled between the second power supply node and the control terminal of the cascode transistor, and a bias transistor having a control terminal connected to the control terminal of the cross-coupling transistor, a first output terminal connected to the control terminal of the cascode transistor, and a second control terminal coupled to the first power supply voltage node; and wherein the second amplifier further comprises a current source coupled between the second power supply node and the control terminal of the cascode transistor, and a bias transistor having a control terminal connected to the control terminal of the cross-coupling transistor, a first output terminal connected to the control terminal of the cascode transistor, and a second control terminal coupled to the first power supply voltage node.

9. The balanced amplifier of claim 8 wherein, for both the first and second amplifiers, the cascode transistor and the cross-coupling transistor are metal-oxide-semiconductor transistors of a first conductivity type, and the bias transistor is a metal-oxide-semiconductor transistor of a second conductivity type different from the first conductivity type.

10. A read system for reading information from a magnetic storage medium comprising:

a high-temperature coefficient resistive fly-height sense head having two terminals; and

a balanced amplifier in accordance with claim 1 ;

wherein each of the read head terminals are coupled to a respective one of the first and second input signal nodes of the balanced amplifier.

11. The read system of claim 10 further comprising:

an additional balanced amplifier in accordance with claim 1 ;

wherein each of the read head terminals are also coupled to a respective one of the first and second input signal nodes of the additional balanced amplifier.

12. The apparatus of claim 1 wherein, for both the first and second amplifiers, a second load is coupled between the second output terminal of the input transistor and the first power supply node.

13. An apparatus comprising:

first and second input signal nodes;

a high-temperature coefficient resistive fly-height sense head coupled between the first and second input nodes;

a first amplifier circuit including an input transistor, a load resistor, a cascode transistor, and a cross-coupling transistor, the input transistor having a control terminal connected to the first input signal node, a first output terminal coupled to a first output terminal of the cross-coupling transistor, the cascode transistor having an input terminal, a first output terminal coupled to a second output terminal of the cross-coupling transistor, and the load resistor coupled between a second output terminal of the cascode transistor and a second power supply node;

a second amplifier circuit including an input transistor, a load resistor, a cascode transistor, and a cross-coupling transistor, the input transistor having a control terminal connected to the first input signal node, a first output terminal coupled to a first output terminal of the cross-coupling transistor, the cascode transistor having a control terminal, a first output terminal coupled to a second output terminal of the cross-coupling transistor, and the load resistor coupled between a second output terminal of the cascode transistor and the second power supply node;

a first coupling circuit including a capacitor, a current source, a voltage-follower, and a coupling transistor, the first coupling circuit being connected such that a control terminal of the coupling transistor is connected to the first input signal node, a control terminal of the voltage-follower is connected to a first output terminal of the coupling transistor, a first output terminal of the voltage follower coupling to the second output terminal of the input transistor in the first amplifier, the capacitor is connected between the first output terminal of the coupling transistor and a control terminal of the cross-coupling transistor of the second amplifier circuit, and the current source is connected between the first output terminal of the coupling transistor and the first voltage source node; and

a second coupling circuit including a capacitor, a current source, a voltage-follower, and a coupling transistor, the second coupling circuit being connected such that a control terminal of the coupling transistor is connected to the second input signal node, a control terminal of the voltage-follower is connected to a first output terminal of the coupling transistor, a first output terminal of the voltage follower coupling to the second output terminal of the input transistor in the second amplifier circuit, the capacitor is connected between the first output terminal of the coupling transistor and a control terminal of the cross-coupling transistor of the first amplifier circuit, and the current source is connected between the first output terminal of the coupling transistor and the first voltage source node.

14. The apparatus of claim 13 wherein, for both of the first and second amplifier circuits, the first output terminal of the input transistor being a collector of a bipolar transistor of a first conductivity type, the first output terminal of the cross-coupling transistor is a source terminal of an metal-oxide-semiconductor transistor, and the first output terminal of the voltage-follower is an emitter of a bipolar transistor of the first conductivity type; and wherein, for each of the coupling circuit, the first output terminal of the coupling transistor is an emitter of a bipolar transistor of a second conductivity type different from the first conductivity type.

15. The apparatus of claim 13 wherein the first amplifier circuit further comprises a voltage-follower having a control terminal connected to the control terminal of the cascode transistor, a first output terminal connected to a second output terminal of the coupling transistor of the first coupling circuit, and a second output terminal coupled to the second power supply node; and wherein the second amplifier circuit further comprises a voltage-follower having a control terminal connected to the control terminal of the cascode transistor, a first output terminal connected to a second output terminal of the coupling transistor of the second coupling circuit, and a second output terminal coupled to the second power supply node.

16. The apparatus of claim 13 wherein the first amplifier further comprises a current source connected between the second power supply node and the control terminal of the cascode transistor, and a bias transistor having a control terminal connected to the control terminal of the cross-coupling transistor, a first output terminal connected to the control terminal of the cascode transistor, and a second control terminal coupled to the first power supply voltage node; and wherein the second amplifier further comprises a current source connected between the second power supply node and the control terminal of the cascode transistor, and a bias transistor having a control terminal connected to the control terminal of the cross-coupling transistor, a first output terminal connected to the control terminal of the cascode transistor, and a second control terminal coupled to the first power supply voltage node.

17. The apparatus of claim 16 wherein, for both the first and second amplifiers, the cascode transistor and the cross-coupling transistor are metal-oxide-semiconductor transistors of a first conductivity type, and the bias transistor is a metal-oxide-semiconductor transistor of a second conductivity type different from the first conductivity type.

18. The apparatus of claim 13 wherein, for both the first and second amplifiers, a second load is coupled between a second output terminal of the input transistor and the first power supply node.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER IN THE INCORRECT US PATENT NO. 8,876,094 PREVIOUSLY RECORDED ON REEL 047351 FRAME 0384. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 8, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 049248/0558 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF THE MERGER PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0910. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047351/0384 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0910 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 27, 2013
From: STRAUB, MICHAEL P.; KREBS, ANDREW P.
To: LSI CORPORATION
Reel/Frame 031852/0598 →