Semiconductor device and fabrication method
A semiconductor device includes a semiconductor substrate including a well having a first conductivity type defined by a device isolation region, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film and including a first side surface and a second side surface facing the first side surface, and a first side wall insulating film formed on the first side surface and a second side wall insulating film formed on the second side surface.
1. A semiconductor device comprising:
a semiconductor substrate;
a device isolation region formed in the semiconductor substrate;
a well, that has a first conductivity type, defined by the device isolation region;
a gate insulating film formed on the semiconductor substrate;
a gate electrode formed on the gate insulating film, the gate electrode including a first side surface and a second side surface facing the first side surface; and
a first side wall insulating film formed on the first side surface and a second side wall insulating film formed on the second side surface, wherein
the semiconductor substrate includes a mesa structure located below the first side wall insulating film, the gate electrode and the second side wall insulating film,
the mesa structure includes a first side surface and a second side surface,
a first semiconductor layer, that has the second conductivity type and that forms a source region is formed outside of the first side surface of the mesa structure, with the first semiconductor layer being connected to the semiconductor substrate on the first side surface,
a second semiconductor layer, that has second conductivity type and that forms a drain region is formed outside of the second side surface of the mesa structure, with the second semiconductor layer being connected to the semiconductor substrate on the second side surface,
a first embedded insulating region, that includes a first insulating film, is formed beneath the first semiconductor layer;
a second embedded insulating region, that includes the first insulating film, is formed beneath the second semiconductor layer, and
a second insulating film is formed between the first embedded insulating region and the first side surface of the mesa structure; and
a third insulating film is formed between the second embedded insulating region and the second side surface of the mesa structure.
2. The semiconductor device as claimed in claim 1 , wherein
the second insulating film and the third insulating film have a thickness equal to or greater than 2 nm and equal to or smaller than 10 nm.
3. The semiconductor device as claimed in claim 1 , wherein
an upper surface of the second insulating film is lower than an upper surface of the first embedded insulating region, and an upper surface of the third insulating film is located lower than an upper surface of the second embedded insulating region.
4. The semiconductor device as claimed in claim 1 , wherein
the first insulating film includes a composition differing from a composition of the second and the third insulating films.
5. The semiconductor device as claimed in claim 1 , wherein
the first insulating film is a silicon oxide film, and
the second and the third insulating films are formed of one of a silicon oxide film, a silicon nitride film and a silicon oxynitride film.
6. The semiconductor device as claimed in claim 1 , wherein
the first insulating film is a silicon oxide film formed by a chemical vapor deposition process, and
the second and the third insulating films are a silicon oxide film formed by one of a thermal oxidation process, a plasma oxidation process and a chemical vapor deposition process.