IP Library Granted Patent US 8,937,390
Granted Patent B2
US 8,937,390 · App. 14/199,078 · Granted Jan 20, 2015

Semiconductor device having a liquid cooling module

Inventors: Nae Hisano (Chiyoda-ku, JP); Shigeo Ohashi (Chiyoda-ku, JP); Yasuo Osone (Chiyoda-ku, JP); Yasuhiro Naka (Chiyoda-ku, JP); Hiroyuki Tenmei (Chiyoda-ku, JP); Kunihiko Nishi (Chiyoda-ku, JP); Hiroaki Ikeda (Tokyo, JP); Masakazu Ishino (Tokyo, JP); Hideharu Miyake (Tokyo, JP); Shiro Uchiyama (Tokyo, JP)
Assignee: PS4 Luxco S.a.r.l.
H01L24/14H01L23/3128H01L23/473H01L23/34H01L2224/16145H01L2224/16225H01L2224/73204H01L2225/06565H01L2924/15311H01L2924/15321H01L2224/32225H01L2224/73253H01L2924/18161
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Quick Facts
Patent No.
US 8,937,390
App. No.
14/199,078
Granted
Jan 20, 2015
Kind
B2
Abstract

A semiconductor device comprises a mounting substrate, a semiconductor element provided above said mounting substrate, a package substrate provided above said mounting substrate with said semiconductor element therebetween and electrically connected to said semiconductor element via a primary connecting bump, a liquid cooling module cooling said semiconductor element by a liquid refrigerant, in which a heat receiving section of the liquid cooling module is disposed between said semiconductor element and said mounting substrate, and a plurality of secondary connecting bumps provided between said package substrate and said mounting substrate.

Claims (6)

1. A semiconductor device, comprising:

a first substrate having a upper surface and a bottom surface;

a first semiconductor memory element comprising a stack of a plurality of semiconductor memory elements including a second semiconductor memory element and a third semiconductor memory element stacked on the second semiconductor memory element, provided above said upper surface of said first substrate, a first primary connecting bump being provided between the second semiconductor memory element and the third semiconductor memory element, and a second primary connecting bump provided between the second semiconductor memory element and said first substrate, the third semiconductor memory element being electrically connected to said first substrate through a through electrode formed inside the second semiconductor memory element, an uppermost semiconductor memory element of the first semiconductor memory element having no through electrode;

a plurality of secondary connecting bumps directly connected to said bottom surface of said first substrate, such that a space is formed between the plurality of secondary connecting bumps; and

a cooling module comprising a heat receiving section disposed on the bottom surface of the first substrate and in the space formed between the plurality of secondary connecting bumps, the cooling module further comprising a refrigerant flowing through the heat receiving section.

2. The semiconductor device according to claim 1 , wherein the heat receiving section expands when the refrigerant flows through the cooling the cooling module.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2018
From: LONGITUDE SEMICONDUCTOR S.A.R.L.
To: LONGITUDE LICENSING LIMITED
Reel/Frame 046865/0667 →
CHANGE OF NAME Recorded Aug 24, 2016
From: PS5 LUXCO S.A.R.L.
To: LONGITUDE SEMICONDUCTOR S.A.R.L.
Reel/Frame 039793/0880 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2016
From: PS4 LUXCO S.A.R.L.
To: PS5 LUXCO S.A.R.L.
Reel/Frame 039818/0506 →
Priority Claims (1)
JP 2009-002106 · Jan 8, 2009 · national
Continuity (2)
Continuation 12683085 · Jan 6, 2010
Related Publication 20140183730A1 · Jul 3, 2014