IP Library Granted Patent US 9,269,314
Granted Patent B2
US 9,269,314 · App. 14/246,048 · Granted Feb 23, 2016

Display driver

Inventors: Masashige Harada (Tokyo, JP); Kunihiko Tani (Tokyo, JP); Sosuke Suji (Tokyo, JP)
Assignee: Synaptics Display Devices GK
G09G3/3611G09G2330/025G09G2360/122G09G2360/18
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Quick Facts
Patent No.
US 9,269,314
App. No.
14/246,048
Granted
Feb 23, 2016
Kind
B2
Abstract

The display driver includes an image memory which is configured by including a plurality of memory mats, a plurality of power supply switches which can perform an ON and OFF control of power supply to each of the plurality of memory mats, and a control circuit which turns on or off the power supply switches. The control circuit turns on the plurality of power supply switches in such a manner that the power supply to the memory mat to which the image data is written at an initial time, among the plurality of memory mats, becomes stable earlier than the power supply to the other memory mats.

Claims (98)

1. A display driver comprising:

a driver circuit which can output a driving signal to a display panel externally connected to the display driver;

a memory which is configured to include a plurality of memory mats and can store image data for generating the driving signal;

a plurality of power supply switches which can perform an ON and OFF control of power supply to each of the plurality of memory mats; and

a control circuit which can perform the ON and OFF control of the plurality of power supply switches,

wherein the image data is stored into the plurality of the memory mats sequentially in a predetermined order, and

wherein the control circuit can perform a control which turns on the plurality of power supply switches in such a manner that power supply to the memory mat to which the image data is written at an initial time, among the plurality of memory mats, becomes stable earlier than power supply to the other memory mats.

2. The display driver according to claim 1 ,

wherein the plurality of power supply switches are configured to include first switches and second switches which are connected to each of the plurality of memory mats, the first switch and the second switch are connected in parallel with each other, and an ON-resistance of the first switch is lower than that of the second switch, and

wherein the control circuit starts the power supply to the memory mat to which the image data is written at an initial time by turning on the first switch earlier than the second switch, and starts the power supply to the other memory mats by turning on the second switch than the first switch.

3. A display driver compromising:

a driver circuit which can output a driving signal to a display panel externally connected to the display driver;

a memory which is configured to include a plurality of memory mats and can store image data for generating the driving signal;

a plurality of power supply switches which can perform an ON and OFF control of power supply to each of the plurality of memory mats; and

a control circuit which can perform the ON and Off control of the plurality of the power supply switches,

wherein the control circuit can perform a control which turns on the plurality of power supply switches in such a manner that power supply to the memory mat to which the image data is written at an initial time, among the plurality of memory mats, becomes stable earlier than power supply to the other memory mats,

wherein the plurality of power supply switches are configured to include first switches and second switches which are connected to each of the plurality of memory mats, the first switch and the second switch are connected in parallel with each other, and an ON-resistance of the first switch is lower than that of the second switch, and

wherein the control circuit starts the power supply to the memory mat to which the image data is written at an initial time by turning on the first switch earlier than the second switch , and starts the power supply to the other memory mats by turning on the second switch than the first switch, and

wherein the first switch and the second switch are configured to include MOSFETs, and the MOSFET which configures the first switch is larger in a ratio of a gate width to a gate length earlier than the MOSFET which configures the second switch.

4. A display driver compromising:

a driver circuit which can output a driving signal to a display panel externally connected to the display driver;

a memory which is configured to include a plurality of memory mats and can store image data for generating the driving signal;

a plurality of power supply switches which can perform an ON and OFF control of power supply to each of the plurality of memory mats; and

a control circuit which can perform the ON and OFF control of the plurality of power supply switches,

wherein the control circuit can perform a control which turns on the plurality of power supply switches in such a manner that power supply to the memory mat to which the image data is written at an initial time, among the plurality of memory mats, becomes stable earlier than power supply to the other memory mats,

wherein the plurality of power supply switch are configured to include power supply switches connected to each of the plurality of memory mats, and

wherein the control circuit starts the power supply by turning on the power supply switch connected to the memory mat to which the image data is written at an initial time earlier than the power supply switches connected to the other memory mats.

5. The display driver according to claim 4 ,

wherein the control circuit starts the power supply by sequentially turning on the power supply switches connected to each of the plurality of memory mats.

6. The display driver according to claim 1 ,

wherein the control circuit can receive a command supplied from a host processor externally connected to the display driver, and can perform the ON and OFF control of the plurality of power supply switches based on the received command.

7. A display driver comprising:

a driver circuit which can output a driving signal to a display panel externally connected to the display driver;

a memory which is configured to include a plurality of memory mats and can store image data for generating the driving signal;

a plurality of power supply switches which can perform an ON and OFF control of power supply to each of the plurality of memory mats; and

a control circuit which can perform the ON and OFF control of the plurality of power supply switches,

wherein the control circuit can perform a control which turns on the plurality of power supply switches in such a manner that power supply to the memory mat to which the image data is written at an initial time, among the plurality of memory mats, becomes stable earlier than power supply to the other memory mats,

wherein the control circuit can receive a command supplied from a host processor externally connected to the display driver, and can perform the ON and OFF control of the plurality of power supply switches based on the received command, and

wherein the control circuit performs a control which starts the power supply to the memory when the command is a command which designates a Command RAM Mode, and performs a control which cuts off the power supply to the memory when the command is a command which designates a Video Through Mode.

8. The display driver according to claim 7 ,

wherein when the command is the command which designates the Command RAM Mode, the control circuit has a function of specifying the memory mat to which the image data is written at an initial time, based on a start address and an end address, which are designated according to the command, of the memory.

9. A display driver compromising:

a driver circuit which can output a driving signal to a display panel externally connected to the display driver;

a memory which is configured to include a plurality of memory mats and can store image data for generating the driving signal;

a plurality of power supply switches which can perform an ON and OFF control of power supply to each of the plurality of memory mats; and

a control circuit which can perform the ON and Off control of the plurality of power supply switches,

wherein the control circuit can perform a control which turns on the plurality of power supply switches in such a manner that power supply to the memory mat to which the image data is written at an initial time, among the plurality of memory mats, becomes stable earlier than power supply to the other memory mats, and

wherein the control circuit includes a register which can designate a size of the display panel externally connected to the display driver, and can perform a control which does not perform the power supply to a portion of the plurality of memory mats based on a value retained in the register.

10. A display driver comprising:

a driver circuit which can output a driving signal to a display panel externally connected to the display driver;

a memory which is configured to include a plurality of memory mats and can store image data for generating the driving signal; and

a control circuit which is connected to a plurality of power supply switches, each power supply switch of the plurality of power supply switches including a first power supply switch connected in parallel with a second power supply switch, each pair of first and second power supply switches being connected to a respective memory mat of the plurality of memory mats, the control circuit being configured to perform an ON and OFF control of power supply to each memory mat of the plurality of memory mats, while an ON-resistance of the first power supply switch is lower than that of the second power supply switch, and is configured to perform an ON and OFF control of each of the plurality of first and second power supply switches,

wherein the control circuit can perform a control which turns on the first power supply switch earlier than the second power supply switch with respect to at least one of the plurality of memory mats and turns on the second power supply switch earlier than the first power supply switch with respect to the other memory mats.

11. A display driver comprising:

a driver circuit which can output a driving signal to a display panel externally connected to the display driver;

a memory which is configured to include a plurality of memory mats and can store image data for generating the driving signal; and

a control circuit which is connected to a first power supply switch and a second power supply switch that are connected in parallel with each other and can perform an ON and OFF control of power supply to each memory mat which configures the plurality of memory mats, while an ON-resistance of the first power supply switch is lower than that of the second power supply switch, and can perform an ON and OFF control of the plurality of first and second switches,

wherein the control circuit can perform a control which turns on the first power supply switch earlier than the second power supply switch with respect to at least one of the plurality of memory mats and turns on the second power supply switch earlier than the first power supply switch with respect to the other memory mats, and

wherein the first power supply switch and the second power supply switch are configured to include MOSFETs, and the MOSFET which configures the first power supply switch is larger in a ratio of a gate width to a gate length than the MOSFET which configures the second power supply switch.

12. The display driver according to claim 10 ,

wherein the control circuit can receive a command supplied from a host processor externally connected to the display driver, and can perform the ON and OFF control of the plurality of first and second power supply switches based on the received command.

13. A display driver comprising:

a driver circuit which can output a driving signal to a display panel externally connected to the display driver;

a memory which is configured to include a plurality of memory mats and can store image data for generating the driving signal; and

a control circuit which is connected to a first power supply switch and a second power supply switch that are connected in a parallel with each other and can perform an ON and OFF control of power supply to each memory mat which configures the plurality of memory mats, while an ON-resistance of the first power supply switch is lower than that of the second power supply switch, and can perform an ON and Off control of each of the plurality of first and second switches,

wherein the control circuit can perform a control which turns on the first power supply switch earlier than the second power supply switch with respect to at least one of the plurality of memory mats and turns on the second power supply switch earlier than the first power supply switch with respect to the other memory mats,

wherein the control circuit can receive a command supplied from a ghost processor externally connected to the display driver, and can perform the ON and OFF control of the plurality of the first and second power supply switches based on the received command, and

wherein the control circuit performs a control which starts the power supply to the memory when the command is a command which designates a Command RAM Mode, and performs a control which cuts off the power supply to the memory when the command is a command which designates a Video Through Mode.

14. The display driver according to claim 13 ,

wherein when the command is the command which designates the Command RAM Mode, the control circuit has a function of specifying the memory mat which is a target of the control of turning on the first power supply switch earlier than the second power supply switch, based on a start address and an end address, which are designated according to the command, of the memory.

15. A display driver comprising:

a driver circuit which can output a driving signal to a display panel externally connected to the display driver;

a memory which is configured to include a plurality of memory mats and can store image data for generating the driving signal; and

a control circuit which is connected to a first power supply switch and a second power supply switch that are connected in a parallel with each other and can perform an ON and OFF control of power supply to each memory mat which configures the plurality of memory mats, while an ON-resistance of the first power supply switch is lower than that of the second power supply switch, and can perform an ON and OFF control of each of the plurality of the first and second switches,

wherein the control circuit can perform a control which turn on the first power supply switch earlier than the second power supply switch with respect to at least one of the plurality of memory mats and turns on the second power supply switch earlier than the first power supply switch with respect to the memory mats,

wherein the control circuit can receive a command supplied from a host processor externally connected to the display driver, and can perform an ON and Off control of the plurality of the first and second power supply switches based on the received command, and

wherein the control circuit performs a control which starts the power supply to the memory when the command is a command which designates a Command RAM Mode, and performs a control which maintains the power supply to the memory to a low leakage current when the command is a command which designates a Video Through Mode.

16. A display driver comprising:

a driver circuit which can output a driving signal to a display panel externally connected to the display driver;

a memory which is configured to include a plurality of memory mats and can store image data for generating the driving signal;

power supply switches which are connected to each of the plurality of memory mats, and can perform an ON and OFF control of power supply to each of the plurality of memory mats; and

a control circuit which can perform the ON and OFF control of the power supply switch,

wherein the image data is stored into the plurality of the memory mats sequentially in a predetermined order, and

wherein the control circuit can perform a control which turns on the power supply switch connected to at least one of the plurality of memory mats earlier than the power supply switches connected to the other memory mats.

17. The display driver according to claim 16 ,

wherein the control circuit starts the power supply by sequentially turning on the power supply switches connected to each of the plurality of memory mats.

18. The display driver according to claim 16 ,

wherein the control circuit can receive a command supplied from a host processor externally connected to the display driver, and can perform the ON and OFF control of the plurality of power supply switches based on the received command.

19. A display driver comprising:

a driver circuit which can output a driving signal to a display panel externally connected to the display driver;

a memory which is configured to include a plurality of memory mats and can store image data for generating the driving signal;

power supply switches which are connected to each of the plurality of memory mats, and can perform an ON and Off control of power supply to each of the plurality of memory mats; and

a control circuit which can perform the ON and Off control of the power supply switch,

wherein the control circuit can perform a control which turns on the power supply switch connected to at least one of the plurality of memory mats earlier than the power supply switches connected to the other memory mats,

wherein the control circuit can receive a command supplied from a host processor externally connected to the display driver, and can perform the ON and OFF control of the plurality of power supply switches based on the received command, and

wherein the control circuit performs a control which starts the power supply to the memory when the command is a command which designates a Command RAM Mode, and performs a control which cuts off the power supply to the memory when the command is a command which designates a Video Through Mode.

20. The display driver according to claim 19 ,

wherein when the command is the command which designates the Command RAM Mode, the control circuit has a function of specifying the memory mat which is a target of the control of turning on the power supply switch earlier than the other memory mats, based on a start address and an end address, which are designated according to the command, of the memory.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 20, 2024
From: SYNAPTICS JAPAN GK
To: SYNAPTICS INCORPORATED
Reel/Frame 067793/0211 →
SECURITY INTEREST Recorded Sep 27, 2017
From: SYNAPTICS INCORPORATED
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 044037/0896 →
CHANGE OF NAME Recorded Aug 8, 2016
From: SYNAPTICS DISPLAY DEVICES GK
To: SYNAPTICS JAPAN GK
Reel/Frame 039711/0862 →
CORRECTIVE ASSIGNMENT TO CORRECT THE FIRST ASSIGNOR'S LAST NAME. PREVIOUSLY RECORDED AT REEL: 032611 FRAME: 0624. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Nov 23, 2015
From: HARADA, MASASHIGE; TANI, KUNIHIKO; TSUJI, SOSUKE
To: RENESAS SP DRIVERS INC.
Reel/Frame 037358/0480 →
CHANGE OF NAME Recorded Jun 1, 2015
From: SYNAPTICS DISPLAY DEVICES KK
To: SYNAPTICS DISPLAY DEVICES GK
Reel/Frame 035799/0129 →
CHANGE OF NAME Recorded Dec 2, 2014
From: RENESAS SP DRIVERS INC.
To: SYNAPTICS DISPLAY DEVICES KK
Reel/Frame 034512/0678 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 5, 2014
From: NARADA, MASASHIGE; TANI, KUNIHIKO; TSUJI, SOSUKE
To: RENESAS SP DRIVERS INC.
Reel/Frame 032611/0624 →
Priority Claims (1)
JP 2013-087225 · Apr 18, 2013 · national
Continuity (1)
Related Publication 20140313183A1 · Oct 23, 2014