IP Library Granted Patent US 9,112,006
Granted Patent B2
US 9,112,006 · App. 14/257,152 · Granted Aug 18, 2015

Semiconductor device and fabricating method of the same

Inventor: Yasutaka Ozaki (Kawasaki, JP)
Assignee: FUJITSU SEMICONDUCTOR LIMITED
H01L21/76879H01L27/11502H01L27/11507H01L28/40H01L28/65H01L21/76816H01L21/76829
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Quick Facts
Patent No.
US 9,112,006
App. No.
14/257,152
Granted
Aug 18, 2015
Kind
B2
Abstract

Openings are formed by lithography and subsequent dry etching at the portions of a first protective film which correspond to connecting holes of second plugs which will be described later, namely at the portions thereof which align with first plugs, wherein the openings have a diameter greater than that of connecting holes by about 0.4 μm.

Claims (25)

1. A fabricating method of a semiconductor device comprising the steps of:

forming a first insulating film comprising at least a first interlayer insulating film on a semiconductor substrate;

forming a first connecting hole in said first insulating film and forming a first plug comprising a conductive material which fills said first connecting hole;

forming a capacitor construction comprising a lower electrode, an upper electrode and a dielectric film interposed therebetween;

forming a second insulating film comprising at least a laminated-layer construction consisting of a first protective film and a second protective film for preventing degradations of the characteristics of said capacitor construction, said first protective film and said second protective film being laminated with a second interlayer insulating film interposed therebetween and said second insulating film covering said capacitor construction; and

forming a second connecting hole in said second insulating film such that said first plug is exposed at least at a portion thereof and forming a second plug comprising a conductive material which fills said second connecting hole;

wherein after forming said first protective film and prior to forming said second interlayer insulating film, said first protective film is processed such that said first protective film is removed at least at the portion which corresponds to said second connecting hole and said first protective film is left to cover said capacitor construction.

2. The fabricating method according to claim 1 , wherein after formation said first protective film and prior to forming said second interlayer insulating film, said first protective film is processed such that said first protective film is removed only at the portion which corresponds to said second connecting hole to have a greater diameter than that of said second connecting hole.

3. The fabricating method according to claim 1 , wherein after forming said first protective film and prior to forming said second interlayer insulating film, said first protective film is processed such that said first protective film is formed to be an island shape which covers only said capacitor construction.

4. The fabricating method according to claim 1 , wherein after forming said first protective film and prior to forming said second interlayer insulating film, said first protective film is processed such that it is left to be an island shape which covers only said capacitor construction and has, at its end portion adjacent to said first plug, a cutout surrounding a portion of the peripheral surface of said first plug adjacent to this end portion.

5. The fabricating method according to claim 1 , wherein a lower-layer protective film for said capacitor construction is formed prior to forming said capacitor construction.

6. The fabricating method according to claim 1 , wherein said process which is applied to said first protective film is not applied to said second protective film and said process is applied only to said first protective film.

7. The fabricating method according to claim 1 , wherein said first protective film and said second protective film are made of a material containing alumina.

8. A fabricating method of a semiconductor device comprising the steps of:

pattern-forming a construction above a semiconductor substrate;

forming an insulating film comprising at least a laminated-layer construction consisting of a first protective film and a second protective film for preventing degradations of the characteristics of said construction through an interlayer insulating film, said first protective film and said second protective film being laminated with an interlayer insulating film interposed therebetween, and said insulating film covering said construction; and

forming a connecting hole in said insulating film and forming a plug comprising a conductive material which fills said connecting hole;

wherein after forming said first protective film and prior to forming said interlayer insulating film, said first protective film is processed such that said first protective film is removed at least at the portion which corresponds to said connecting hole and said first protective film is left to cover at least said construction.

9. The fabricating method according to claim 8 , wherein after formation said first protective film and prior to forming said interlayer insulating film, said first protective film is processed such that said first protective film is removed only at the portion which corresponds to said connecting hole to have a greater diameter than that of said connecting hole.

10. The fabricating method according to claim 8 , wherein after forming said first protective film and prior to forming said interlayer insulating film, said first protective film is processed such that said first protective film is formed to be an island shape which covers only said construction.

11. The fabricating method according to claim 8 , wherein after forming said first protective film and prior to forming said interlayer insulating film, said first protective film is processed such that it is left to be an island shape which covers only said construction and has, at its end portion adjacent to the region of said connecting hole, a cutout surrounding a portion of the peripheral surface of said region adjacent to this end portion.

12. The fabricating method according to claim 8 , further comprising the step of forming another insulating film on said semiconductor substrate and forming another plug in said another insulating film, prior to the pattern formation of said construction;

wherein said plug is formed so as to be electrically connected to said another plug.

13. The fabricating method according to claim 8 , wherein said process which is applied to said first protective film is not applied to said second protective film and said process is applied to only said first protective film.

14. The fabricating method according to claim 8 , wherein said first protective film and said second protective film are made of a material containing alumina.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 13, 2020
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR MEMORY SOLUTION LIMITED
Reel/Frame 053195/0249 →
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →
Priority Claims (2)
JP 2004-351905 · Dec 3, 2004 · national
JP 2005-272595 · Sep 20, 2005 · national
Continuity (3)
Continuation 13355540 · Jan 22, 2012
Continuation 11293893 · Dec 5, 2005
Related Publication 20140227854A1 · Aug 14, 2014