IP Library Granted Patent US 9,099,137
Granted Patent B2
US 9,099,137 · App. 14/272,603 · Granted Aug 4, 2015

Analog tunneling current sensors for use with disk drive storage devices

Inventors: Brad A. Natzke (Rochester, MN); Cameron C. Rabe (Mendota Heights, MN); Hong Jiang (Warren, NJ); Andrew P. Krebs (Eagan, MN); Jason P. Brenden (Mendota Heights, MN)
Assignee: Avago Technologies General IP (Singapore) PTE. LTD
G11B5/6017G11B5/607G11B21/02H03F3/4508H03F3/45071G11B2005/0008G11B2005/0018H03F2203/45116H03F2203/45528
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Quick Facts
Patent No.
US 9,099,137
App. No.
14/272,603
Granted
Aug 4, 2015
Kind
B2
Abstract

Amplifier architectures are provided for current sensing applications. An amplifier includes a load device, an operational amplifier, a current source, and a bipolar transistor. The operational amplifier has a first input terminal connected to a first input node that receives an input current, and a second input terminal connected to a second input node that receives a reference voltage. The current source is connected to an output of the operational amplifier. The operational amplifier, the current source, and the bipolar transistor form a feedback loop that generates and maintains a bias voltage on the first input node based on the reference voltage applied to the second input node. The bipolar transistor amplifies the input current received on the first input node, and generates an amplified input current. The load device converts the amplified input current to an output voltage, wherein the output voltage is used to sense the input current.

Claims (48)

1. An amplifier circuit, comprising:

a first node configured to receive a first current;

a second node configured to receive a reference voltage;

feedback circuitry configured to form a feedback loop that generates and maintains a bias voltage on the first node based on the reference voltage at the second node,

wherein the feedback circuitry comprises a bipolar transistor having a base terminal connected to the first node, and wherein the bipolar transistor is configured to amplify the first current so as to provide a second current;

a reference circuit configured to generate a scaled version of the second current; and

a comparing circuit configured to compare an output voltage with an output reference voltage to detect when the first current is at a predetermined level,

wherein the output voltage is generated based on the second current, and wherein the output reference voltage is generated based on the scaled version of the second current.

2. The amplifier circuit of claim 1 , wherein the feedback circuitry further comprises an operational amplifier and a current source, wherein the operational amplifier comprises first and second input terminals connected to the first and second nodes, respectively, and wherein the current source is connected to an output terminal of the operational amplifier.

3. The amplifier circuit of claim 2 , wherein the current source comprises a field effect transistor having a gate terminal connected to the output terminal of the operational amplifier.

4. The amplifier circuit of claim 2 , further comprising a resistive element connected between the bipolar transistor and the current source.

5. The amplifier circuit of claim 1 , further comprising a sensor element connected to the first node of the amplifier circuit, wherein the sensor element is configured to generate the first current.

6. The amplifier circuit of claim 5 , wherein the sensor element is an element on a read/write head of a storage device.

7. The amplifier circuit of claim 1 , further comprising:

wherein the reference circuit is further configured to generate an output current based on the scaled version of the second current, wherein the output current is a scaled version of the first current; and

a comparing circuit configured to compare the output current with a reference current to detect when the first current is at a predetermined level.

8. A storage system, comprising:

a storage medium;

a read/write head configured to read and write data to and from the storage medium, wherein the read/write head comprises a sensor element configured to generate a first current as the read/write head approaches a surface of the storage medium; and

current sensor circuitry configured to process the first current to detect when the read/write head is positioned at a predefined distance from the surface of the storage medium based on a predetermined level of the first current,

wherein the current sensor circuitry comprises an amplifier circuit, wherein the amplifier circuit comprises:

a first node to receive the first current;

a second node to receive a reference voltage; and

feedback circuitry configured to form a feedback loop that generates and maintains a bias voltage on the first node based on the reference voltage at the second node,

wherein the feedback circuitry comprises a bipolar transistor having a base terminal connected to the first node, and wherein the bipolar transistor is configured to amplify the first current so as to provide a second current;

a reference circuit configured to generate a scaled version of the second current and generate an output current based on the scaled version of the second current, wherein the output current is a scaled version of the first current; and

a comparing circuit configured to compare the output current with a reference current to detect when the first current is at said predetermined level.

9. The storage system of claim 8 , wherein the feedback circuitry further comprises an operational amplifier and a current source, wherein the operational amplifier comprises first and second input terminals connected to the first and second nodes, respectively, and wherein the current source is connected to an output terminal of the operational amplifier.

10. The storage system of claim 9 , wherein the current source comprises a field effect transistor having a gate terminal connected to the output terminal of the operational amplifier.

11. The storage system of claim 9 , wherein the amplifier circuit further comprises a resistive element connected between the bipolar transistor and the current source.

12. The storage system of claim 8 , wherein the current sensor circuitry further comprises:

a comparing circuit configured to compare an output voltage with an output reference voltage to detect when the first current is at said predetermined level,

wherein the output voltage is generated based on the second current, and wherein the output reference voltage is generated based on the scaled version of the second current.

13. A virtual storage system comprising the storage system of claim 8 .

14. The storage system of claim 8 , further comprising a sensor element connected to the first node of the amplifier circuit, wherein the sensor element is configured to generate the first current.

15. The storage system of claim 14 , wherein the sensor element is an element on a read/write head of a storage device.

16. A method, comprising:

receiving a first current at a first node;

receiving a reference voltage at a second node;

generating and maintaining a bias voltage on the first node, based on the reference voltage at the second node, using a feedback loop from the second node to the first node, wherein the feedback loop comprises a bipolar transistor having a base terminal connected to the first node, and wherein the bipolar transistor is configured to amplify the first current so as to provide a second current;

generating a scaled version of the second current; generating an output current based on the scaled version of the second current, wherein the output current is a scaled version of the first current; and

comparing the output current with a reference current to detect when the first current is at a predetermined level.

17. The method of claim 16 , wherein the first current is generated by a sensor element connected to the first node.

18. The method of claim 17 , wherein the sensor element is an element on a read/write head of a storage device.

19. The method of claim 16 , further comprising:

generating an output voltage based on the second current;

generating an output reference voltage based on the scaled version of the second current; and

comparing the output voltage with the output reference voltage to detect when the first current is at a predetermined level.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047422 FRAME: 0464. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0702 →
MERGER Recorded Oct 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047422/0464 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
Continuity (3)
Continuation 13674308 · Nov 12, 2012
Provisional Application 61608172 · Mar 8, 2012
Related Publication 20140240870A1 · Aug 28, 2014