Oscillator having dual topology

1. An oscillator comprising:

a tank circuit;

a first transistor and a second transistor, wherein the second transistor occupies an area of silicon that is smaller than an area of silicon occupied by the first transistor; and

a switching apparatus for selecting either one of a first oscillator topology and a second oscillator topology, wherein

in the first oscillator topology, the tank circuit is coupled to the first transistor in a first feedback configuration to provide feedback around the first transistor;

in the second oscillator topology, the tank circuit is coupled to the second transistor in a second feedback configuration that is different to the first feedback configuration to provide feedback around the second transistor;

the tank circuit comprises an inductive device having a first port coupled to a first port of a first capacitive device and having a second port coupled to a first port of a second capacitive device;

the first capacitive device comprises first and second capacitive elements coupled in series between the first port of the first capacitive device and a first voltage rail, and a second port arranged between the first and second capacitive elements and coupling the first and second capacitive elements to the first transistor; and

the second capacitive device comprises third and fourth capacitive elements coupled in series between the first port of the second capacitive device and the first voltage rail, and a second port arranged between the first and second capacitive elements.

2. An oscillator as claimed in claim 1 , wherein at least one of the first, second, third and fourth capacitive elements comprises a variable capacitance.

3. An oscillator as claimed in claim 1 , comprising:

a third transistor, wherein the second transistor occupies an area of silicon that is smaller than an area of silicon occupied by the third transistor, and whereby:

in the first feedback configuration the first and second capacitive elements constitute a first voltage divider arranged to feed back a proportion of a voltage at a gate of the first transistor to a first terminal of the first transistor and the third and fourth capacitive elements constitute a second voltage divider arranged to feed back a proportion of a voltage at a gate of the third transistor to a first terminal of the third transistor, and

in the second feedback configuration the first and second capacitive devices constitute a third voltage divider arranged to feed back a proportion of a voltage at a first terminal of the second transistor to a gate of the second transistor.

4. An oscillator as claimed in claim 3 , wherein:

a first resistive element is coupled between the first and second ports of the inductive device;

the first port of the inductive device is coupled to the second port of the first capacitive device by means of a second resistive element;

the second port of the inductive device is coupled to the second port of the second capacitive device by means of a third resistive element;

the gate of the first transistor is coupled to a first bias voltage rail by means of a fourth resistive element, and to the first port of the inductive device, and the first terminal of the first transistor is coupled to the second port of the first capacitive device;

the gate of the second transistor is coupled to the first port of the inductive device, the first terminal of the second transistor is coupled to the second port of the inductive device by means of a fifth switch element, and a second terminal of the second transistor device is coupled to a second voltage rail;

the gate of the third transistor is coupled to the first bias voltage rail by means of a fifth resistive element, and to the second port of the inductive device, and the first terminal of the third transistor is coupled to the second port of the second capacitive device; and

the switching apparatus comprises:

a first switch element coupled between a second terminal of the first transistor and the second voltage rail,

a second switch element coupled in series with the fourth resistive element for decoupling the gate of the first transistor from the first bias voltage rail,

a third switch element coupled between a second terminal of the third transistor and the second voltage rail,

a fourth switch element coupled in series with the fifth resistive element for decoupling the gate of the third transistor from the first bias voltage rail,

the fifth switch element,

a first switchable current source coupled between the second port of the first capacitive device and the first voltage rail,

a second switchable current source coupled between the second port of the inductive device and the first voltage rail, and

a third switchable current source coupled between the second port of the second capacitive device and the first voltage rail.

5. An oscillator as claimed in claim 4 , wherein the switching apparatus comprises a control stage arranged to control the first, second, third, fourth and fifth switch elements, and the first, second and third switchable current sources such that,

when the first oscillator topology is selected:

the first, second, third and fourth switch elements each have a relatively low impedance state;

the fifth switch element has a relatively high impedance state;

the first switchable current source sources a first current;

the second switchable current source is switched off; and

the third switchable current source sources a second current; and

when the second oscillator topology is selected:

the first, second, third and fourth switch elements each have a relatively high impedance state;

the fifth switch element has a relatively low impedance state;

the first and third switchable current sources are each switched off; and

the second switchable current source sources a third current.

6. An oscillator as claimed in claim 5 , comprising:

an eleventh switch element coupled in series with the second resistive element for decoupling the first port of the inductive device from the second port of the first capacitive device; and

a twelfth switch element coupled in series with the third resistive element for decoupling the second port of the inductive device from the second port of the second capacitive device;

wherein the control stage is arranged to control the eleventh and twelfth switch elements such that, when the first oscillator topology is selected, the eleventh and twelfth switch elements have a relatively high impedance state, and when the second oscillator topology is selected, the eleventh and twelfth switch elements have a relatively low impedance state.

7. An oscillator as claimed in claim 3 , wherein:

the gate of the first transistor is coupled to a first bias voltage rail by means of a fourth resistive element, to a second bias voltage by means of a sixth resistive element, and to the first port of the inductive device and the first terminal of the first transistor is coupled to the second port of the first capacitive device;

the first terminal of the second transistor is coupled to the first port of the inductive device, and the second terminal of the second transistor is coupled to the first voltage rail by means of a fifth capacitive element;

the gate of the third transistor is coupled to the first bias voltage rail by means of a fifth resistive element, to the second bias voltage rail by means of a seventh resistive element, and to the second port of the inductive device, and the first terminal of the third transistor is coupled to the second port of the second capacitive device;

the oscillator further comprises:

a fourth transistor having a first terminal coupled to the second port of the inductive device and a second terminal coupled to the first voltage rail by means of a sixth capacitive element, wherein a gate of the fourth transistor is coupled to the first terminal of the second transistor and the first terminal of the fourth transistor is coupled to the gate of the second transistor;

a fifth transistor having a first terminal coupled to the first port of the inductive device, a second coupled to the second voltage rail, and a gate of the fifth transistor coupled to the second bias voltage rail;

a sixth transistor device having a first terminal coupled to the second port of the inductive device, a second terminal coupled to the second voltage rail, and

a gate of the sixth transistor coupled to the second bias voltage rail;

the second port of the first capacitive device is coupled to the second bias voltage rail by means of an eighth resistive element;

the second port of the second capacitive device is coupled to the second bias voltage rail by means of a ninth resistive element; and

the switching apparatus comprises:

a first switch element coupled between a second terminal of the first transistor and the second voltage rail;

a second switch element coupled in series with the fourth resistive element for decoupling the gate of the first transistor from the first bias voltage rail;

a third switch element coupled between a second terminal of the third transistor and the second voltage rail;

a fourth switch element coupled in series with the fifth resistive element for decoupling the gate of the third transistor from the first bias voltage rail;

a sixth switch element coupling the gate of the fifth transistor and the gate of the sixth transistor to the second voltage rail;

a seventh switch element coupling the sixth and eighth resistive elements to the second bias voltage rail, and arranged for decoupling the second port of the first capacitive device and the gate of the first transistor from the second bias voltage rail;

an eighth switch element coupling the seventh and ninth resistive elements to the second bias voltage rail, and arranged for decoupling the second port of the second capacitive device and the gate of the third transistor from the second bias voltage rail;

a first switchable current source coupled between the second port of the first capacitive and the first voltage rail;

a second switchable current source coupled between the second terminal of the second transistor and the first voltage rail;

a third switchable current source coupled between the second port of the second capacitive device and the first voltage rail; and

a fourth switchable current source coupled between the second terminal of the fourth transistor and the first voltage rail.

8. An oscillator as claimed in claim 7 , wherein the switching apparatus comprises a control stage arranged to control the first, second, third, fourth, sixth, seventh and eighth switch elements and the first, second, third and fourth switchable current sources such that,

when the first oscillator topology is selected:

the first, third, seventh and eighth switch elements each have a relatively low impedance state;

the second and fourth switch elements each have a relatively high impedance state;

the first switchable current source sources a first current;

the third switchable current source sources a second current; and

the second and fourth switchable current sources are each switched off; and

when the second oscillator topology is selected:

the first, third, seventh and eighth switch elements each have a relatively high impedance state;

the second and fourth switch elements each have a relatively low impedance state;

the first and third switchable current sources are each switched off;

the second switchable current source sources a third current; and

the fourth switchable current source sources a fourth current.

9. An oscillator as claimed in claim 7 , wherein

the switching apparatus further comprises an ninth switch element and a tenth switch element, wherein the first terminal of the second transistor is coupled to the first port of the inductive device by means of the ninth switch element and the first port of the fourth transistor is coupled to the second port of the inductive device by means of the tenth switch element, and wherein the control stage is arranged to control the ninth and tenth switch elements such that

when the first oscillator topology is selected, the ninth and tenth switch elements each have a relatively high impedance state, and

when the second oscillator topology is selected, the eighth and tenth switch elements each have a relatively low impedance state.

10. An oscillator as claimed in claim 1 , wherein the inductive device is a piezoelectric device.

11. An oscillator as claimed in claim 10 , wherein the piezoelectric device is a quartz crystal.

12. An electronic apparatus comprising an oscillator according to claim 1 .

13. An electronic apparatus as claimed in claim 12 , wherein the electronic apparatus is a wireless communication apparatus.

14. A method of operating an oscillator comprising selecting either one of a first oscillator topology and a second oscillator topology, wherein selecting the first oscillator topology comprises coupling a tank circuit to a first transistor in a first feedback configuration to provide feedback around the first transistor, and selecting the second oscillator topology comprises coupling the tank circuit to a second transistor in a second feedback configuration that is different to the first feedback configuration to provide feedback around the second transistor, wherein the second transistor occupies an area of silicon that is smaller than an area of silicon occupied by the first transistor, wherein the tank circuit comprises an inductive device having a first port coupled to a first port of a first capacitive device and having a second port coupled to a first port of a second capacitive device, wherein the first capacitive device comprises first and second capacitive elements coupled in series between the first port of the first capacitive device and a first voltage rail, and a second port arranged between the first and second capacitive elements and coupling the first and second capacitive elements to the first transistor.