IP Library Granted Patent US 9,760,222
Granted Patent B2
US 9,760,222 · App. 14/565,423 · Granted Sep 12, 2017

Semiconductor device and error canceling method

Inventors: Tatsuya Ishii (Tokyo, JP); Nobukazu Tanaka (Tokyo, JP); Hiroshi Takeyama (Tokyo, JP); Akihito Akai (Tokyo, JP)
Assignee: Synaptics Japan GK
G06F3/044G06F3/0418
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Quick Facts
Patent No.
US 9,760,222
App. No.
14/565,423
Granted
Sep 12, 2017
Kind
B2
Abstract

Embodiments herein include a device, system, and method for periodically capturing sensing signals using one or more detection electrodes to generate data for detecting an object proximate to the detection electrodes. The sensing signals are captured during detection periods within periodic detection cycles where each of the detection cycles define a period of time between consecutive detection periods. In addition, the device, system and method set a duration of the detection cycle to 1/m (where m is appositive integer) of a duration of a display-scan cycle. The value of m is selected based on a periodic noise signal. Thus, the device, system, and method may prevent a periodic noise signal which has a cycle that is longer than the detection period from worsening the accuracy of touch detection.

Claims (55)

1. A semiconductor device comprising:

a capacitive sensing controller operable to:

periodically capture sensing signals using one or more detection electrodes to generate data for detecting an object proximate to the detection electrodes, wherein the sensing signals are captured during detection periods in periodic detection cycles, each detection cycle defining a period of time between consecutive detection periods, and wherein a single drive pulse is applied to the detection electrodes during each of the detection periods; and

a processor operable to set a duration of the detection cycles,

wherein the duration of the detection cycles is an odd multiple greater than one of a half a duration of a display-scan cycle defined by timing signals or an odd multiple of half of 1/m (where m is an integer greater than one) of the duration of the display-scan cycle,

wherein a duration of the detection periods is an integer multiple of 1/n of the display-scan cycle (where n is a positive integer),

wherein the duration of the detection cycles is longer than the duration of the detection periods, and

wherein n is selected based on a periodic noise signal.

2. The semiconductor device according to claim 1 , wherein the processor is operable to determine a value of the m based on a periodic noise signal.

3. The semiconductor device according to claim 1 , wherein in the capacitive sensing controller a duration of each of the detection periods is specified by detection-period-set data.

4. The semiconductor device according to claim 3 , wherein the processor is operable to determine a value of n based on identifying a value of the duration of the detection periods that is substantially the same as an integer multiple of a cycle period of the periodic noise signal.

5. The semiconductor device according to claim 3 , wherein the processor has a non-volatile memory comprising:

detection-cycle-set data for specifying 1/m of a display-scan cycle, and detection-period-set data for specifying the integer multiple of 1/n of the display-scan cycle, wherein the detection-cycle-set data and detection-period-set data are rewritably stored in the non-volatile memory.

6. The semiconductor device according to claim 1 , wherein by using the duration of the detection cycles, the capacitive sensing controller is configured to:

align a first one of the consecutive detection periods with a positive portion of a periodic noise signal; and

align a second one of the consecutive detection periods with a negative portion of the periodic noise signal, wherein the positive portion and the negative portion have similar magnitudes.

7. The semiconductor device according to claim 1 , wherein the processor has a non-volatile memory, and

detection-period-set data for specifying 1/m of the display-scan cycle is rewritably stored in the non-volatile memory.

8. The semiconductor device according to claim 1 , further comprising:

a display controller operable to supply graduation signals to signal electrodes of a display panel in synchronization with capturing the sensing signals using the one or more detection electrodes in each display-scan cycle of the display panel.

9. The semiconductor device according to claim 1 , wherein the capacitive sensing controller performs touch detection and noise detection using the detection cycles, wherein:

during touch detection, the capacitive sensing controller drives a drive electrode to capture the sensing signals,

during noise detection the capacitive sensing controller stops driving the drive electrode to capture the sensing signals,

the processor is operable to determine the duration of the detection cycles based on measured during noise detection.

10. The semiconductor device according to claim 9 , wherein the capacitive sensing controller is operable to set a duration of the detection periods to perform the touch detection and noise detection,

wherein the duration of the detection periods is an integer multiple of 1/n of the display-scan cycle (where n is a positive integer).

11. A semiconductor device comprising:

a display controller operable to update a display panel in synchronization with a display-scan cycle; and

a capacitive sensing controller operable to detect detection data according to capacitance between drive and detection electrodes by periodically capturing sensing signals on the detection electrodes, wherein detecting the detection data is synchronized with the display-scan cycle,

wherein the capacitive sensing controller performs the periodic capture during detection periods in periodic detection cycles, each detection cycle defining a period of time between consecutive detection periods,

wherein a single drive pulse is applied to the detection electrodes during each of the detection periods,

wherein a duration of the detection cycles is an odd multiple greater than one of a half a duration of a display-scan cycle defined by timing signals or an odd multiple of half of 1/m (where m is an integer greater than one) of the duration of the display-scan cycle,

wherein a duration of the detection periods is an integer multiple of 1/n of the display-scan cycle (where n is a positive integer),

wherein the duration of the detection cycles is longer than the duration of the detection periods, and

wherein n is selected based on a periodic noise signal.

12. A noise reduction method, comprising:

capturing sensing signals using one or more detection electrodes to generate detection data associated with an object proximate to the detection electrodes, wherein the sensing signals are captured during detection periods in periodic detection cycles, each detection cycle defining a period of time between consecutive detection periods, and wherein a single drive pulse is applied to the detection electrodes during each of the detection periods; and

setting a duration of the detection cycles such that a duration of the detection cycles is an odd multiple greater than one of a half a duration of a display-scan cycle defined by timing signals or an odd multiple of half of 1/m (where m is an integer greater than one) of the duration of the display-scan cycle,

wherein a duration of the detection periods is an integer multiple of 1/n of the display-scan cycle (where n is a positive integer),

wherein the duration of the detection cycles is longer than the duration of the detection periods, and

wherein n is selected based on a periodic noise signal.

13. The noise reduction method according to claim 12 , further comprising:

determining a value of m based on a cycle period of a periodic noise signal.

14. The noise reduction method according to claim 12 , further comprising:

determining a value of n based on identifying a value of the duration of the detection periods that is substantially the same as an integer multiple of a cycle period of a periodic noise signal.

15. The noise reduction method according to claim 12 , further comprising:

aligning a first one of the consecutive detection periods with a positive portion of a periodic noise signal; and

aligning a second one of the consecutive detection periods with a negative portion of the periodic noise signal, wherein the positive portion and the negative portion have similar magnitudes.

16. The noise reduction method according to claim 15 , further comprising:

performing noise detection using the one or more detection electrodes to generate noise data; and

identifying a periodic noise signal using the noise data.

17. The noise reduction method according to claim 12 ,

wherein the display-scan cycle defines a time used to update one line of a display using a single gate electrode, wherein the detection cycle is within the display-scan cycle.

18. The noise reduction method according to claim 12 , further comprising:

supply gradation signals to signal electrodes of a display panel in synchronization with capturing the sensing signals using the one or more detection electrodes in each display-scan cycle of the display panel.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 20, 2024
From: SYNAPTICS JAPAN GK
To: SYNAPTICS INCORPORATED
Reel/Frame 067793/0211 →
SECURITY INTEREST Recorded Sep 27, 2017
From: SYNAPTICS INCORPORATED
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 044037/0896 →
CHANGE OF NAME Recorded Aug 8, 2016
From: SYNAPTICS DISPLAY DEVICES GK
To: SYNAPTICS JAPAN GK
Reel/Frame 039710/0331 →
CHANGE OF NAME Recorded Jun 1, 2015
From: SYNAPTICS DISPLAY DEVICES KK
To: SYNAPTICS DISPLAY DEVICES GK
Reel/Frame 035799/0129 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2014
From: ISHII, TATSUYA; TANAKA, NOBUKAZU; TAKEYAMA, HIROSHI; AKAI, AKIHITO
To: SYNAPTICS DISPLAY DEVICES KK
Reel/Frame 034475/0585 →
Priority Claims (1)
JP 2013-256856 · Dec 12, 2013 · national
Continuity (1)
Related Publication 20150169108A1 · Jun 18, 2015