Hard disk drive preamplifier with write driver having bypass current sources for compensation of write head magnetic asymmetry
View Patent ↗A disk drive preamplifier (preamp) includes a write driver that has two pairs of programmable bypass current sources not connected to the write current source to compensate for the inherent magnetic asymmetry of the write head. One pair of the programmable bypass current sources provides a fixed bypass current in one direction. The other pair provides a fixed bypass current in the opposite direction. Prior to writing, only one of the pairs of bypass current sources is selected and programmed with the correct value of bypass current. When the write driver generates the positive and negative write current pulses during writing the selected bypass current sources provide a fixed offset to the amplitude of the write current pulses.
1. A preamplifier for connection to a magnetic recording disk drive inductive write head comprising:
a write current source;
an H-bridge connected to the write current source for connection to the write head and including a plurality of switches responsive to a data signal for directing write current in two directions to thereby generate positive and negative write pulses to the write head;
a first selectable pair of bypass current sources not connected to the write current source for connection to the write head for directing bypass current in a first direction to the write head;
a second selectable pair of bypass current sources not connected to the write current source for connection to the write head for directing bypass current in a second direction opposite to said first direction to the write head; and
logic circuitry for selecting one of said bypass current pairs, whereby a selected one of said first and second bypass currents provides an offset to the positive and negative write pulses to the write head.
2. The preamplifier of claim 1 further comprising first and second terminals for connection to the write head and wherein one bypass current source of each pair is connected to one terminal and the other bypass current source of each pair is connected to the other terminal.
3. The preamplifier of claim 2 wherein the plurality of H-bridge switches comprises a first switch connected to the first terminal and a fourth switch connected to the second terminal, and a second switch connected to the second terminal and a third switch connected to the first terminal, wherein write current flows in first and fourth switches in a first direction to generate a positive write pulse and in second and third switches in a second direction opposite to said first direction to generate a negative write pulse.
4. The preamplifier of claim 1 further comprising write overshoot current circuitry comprising a write overshoot current source and a switch responsive to a transition in write current direction for directing write overshoot current to the write head.
5. The preamplifier of claim 1 wherein each pair of bypass current sources is adapted to provide a programmed value of bypass current.
6. The preamplifier of claim 1 wherein the preamplifier is adapted for connection to a disk drive system-on-a-chip (SOC) by a transmission line that includes a write path for the data signal and a serial logic path, and wherein the logic circuitry comprises:
a register for receipt from the SOC on the serial logic path of a pair selection value representative of the pair of bypass current sources to be selected and of a digital bypass current value representative of the value of bypass current; and
a digital-to-analog converter (DAC) coupled to the register and the pairs of bypass current sources, whereby the selected pair of bypass current sources are capable of generating the bypass current represented by said digital bypass current value.
7. The preamplifier of claim 6 wherein the preamplifier is adapted for connection to multiple write heads, and wherein said register is adapted to store multiple pair selection values and digital bypass current values.
8. A preamplifier for connection to a plurality of magnetic recording disk drive inductive write heads comprising:
a write driver comprising:
a write current source;
an H-bridge connected to the write current source and having first and second terminals for connection to a selected one of the write heads, the H-bridge including a plurality of switches responsive to a data signal for directing write current in two directions to thereby generate positive and negative write pulses to the selected write head;
a first selectable pair of bypass current sources not connected to the write current source for connection to the selected write head for directing bypass current in a first direction to the selected write head;
a second selectable pair of bypass current sources not connected to the write current source for connection to the selected write head for directing bypass current in a second direction opposite to said first direction to the selected write head, wherein one bypass current source of each pair is connected to the first terminal and the other bypass current source of each pair is connected to the second terminal;
a register for storing a plurality of digital pair selection values representative of the pair of bypass current sources to be selected for each write head and a plurality of digital bypass current values representative of the value of bypass current for each write head; and
a digital-to-analog converter (DAC) coupled to the register and the pairs of bypass current sources for generating an analog value representative of the value of bypass current for each write head; and
logic circuitry for selecting one of said bypass current pairs, whereby a selected one of said first and second bypass currents provides an offset to the positive and negative write pulses to the selected write head.
9. The preamplifier of claim 8 wherein the plurality of H-bridge switches comprises a first switch connected to the first terminal and a fourth switch connected to the second terminal, and a second switch connected to the second terminal and a third switch connected to the first terminal, wherein write current flows in first and fourth switches in a first direction to generate a positive write pulse and in second and third switches in a second direction opposite to said first direction to generate a negative write pulse.
10. The preamplifier of claim 8 wherein the write driver further comprises write overshoot current circuitry comprising a write overshoot current source and a switch responsive to a transition in write current direction for directing write overshoot current to the selected write head.
11. The preamplifier of claim 8 wherein the preamplifier is adapted for connection to a disk drive system-on-a-chip (SOC) by a transmission line that includes a write path for the data signal and a serial logic path, and wherein the register is adapted to receive, from the SOC on the serial logic path, the digital pair selection values and the digital bypass current values.