IP Library Granted Patent US 9,595,591
Granted Patent B2
US 9,595,591 · App. 14/646,461 · Granted Mar 14, 2017

Semiconductor device and method for manufacturing same

Inventor: Takeshi Nagai (Tokyo, JP)
Assignee: LONGITUDE SEMICONDUCTOR S.A.R.L.
H01L29/4238H01L21/283H01L21/823842H01L21/823857H01L27/108H01L27/10844H01L29/0692H01L29/4958H01L29/4966H01L29/517H01L29/66484H01L29/7831H01L29/6659H01L29/7833
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Quick Facts
Patent No.
US 9,595,591
App. No.
14/646,461
Granted
Mar 14, 2017
Kind
B2
Abstract

One device includes a substrate which contains a well region of one conductivity type, an element isolation insulating film which is arranged within the well region, an island-shaped active region which is surrounded by the element isolation insulating film, two first gate structures which are arranged on the island-shaped active region, and each of which is configured by sequentially laminating a lower gate insulating film, a gate insulating film having a high dielectric constant, a first gate electrode film containing a metal material, and a second gate electrode film, and a second gate structure which includes a second gate electrode film that is in contact with and covers a part of the element isolation insulating film. The two first gate structures and the second gate structure are successively arranged in the order of one first gate structure, the second gate structure and the other first gate structure.

Claims (21)

1. A device comprising:

a semiconductor substrate comprising, on one surface side thereof, an island-shaped first active region surrounded by an element isolation insulating film formed in an embedded manner;

a gate structure formed on one surface of the semiconductor substrate, wherein the gate structure includes a first part which extends in a first direction in such a way as to cross over the first active region, and a second part which extends in a second direction intersecting the first direction, and which is disposed on the element isolation insulating film in such a way as to connect to the first part, wherein the first direction is parallel to the one surface of the semiconductor substrate and the second direction is parallel to the one surface of the semiconductor substrate;

at least a part of the first part that is located on the first active region employs a first structure in which a high dielectric-constant film, a first electrode film containing a metal, and a second electrode film different from the first electrode film are successively laminated; and

the second part employs a second structure which includes the second electrode film but does not include the high dielectric-constant film or the first electrode film.

2. The device of claim 1 , wherein the second electrode film of the second part is in contact with the element isolation insulating film.

3. The device of claim 1 , wherein the second structure is employed at the boundary between the first part and the second part.

4. The device of claim 1 , wherein the gate structure further includes a third part which is disposed parallel to and at a distance from the first part in such a way as to cross over the first active region, and which is connected to the second part, and wherein at least a part of the third part that is located on the first active region employs the first structure.

5. The device of claim 1 , wherein:

the semiconductor substrate further comprises an island-shaped second active region surrounded by the element isolation insulating film;

the gate structure further includes a third part which extends in the first direction in such a way as to cross over the second active region, and which is connected to the second part; and

at least a part of the third part that is located on the second active region employs the first structure.

6. The device of claim 1 , wherein the first active region is defined in a well formed in the semiconductor substrate, and the first part and the second part are disposed above the well.

7. The device of claim 6 , wherein the semiconductor substrate further includes another well of a conductivity type that differs from that of the abovementioned well, and wherein the gate structure includes, above the other well, a part having a disposition and a structure that are similar to those of the first part and the second part.

8. The device of claim 6 , wherein the semiconductor substrate further includes another well of a conductivity type that differs from that of the abovementioned well, and wherein the gate structure includes, above the other well, a part which has a disposition that is similar to that of the first part and the second part and which employs the second structure.

9. The device of claim 1 , wherein the high dielectric-constant film includes hafnium, the first electrode film includes titanium or tantalum, and the second electrode film includes amorphous silicon.

10. The device of claim 1 , comprising a lower-layer gate insulating film formed on the surface of the first active region.

11. A method of manufacturing a device, comprising:

forming a high dielectric-constant film and a first electrode film containing a metal by lamination on one surface side of a semiconductor substrate in such a way as to cover an active region surrounded by an element isolation insulating film;

forming a second electrode film in such a way as to cover the high dielectric-constant film and the first electrode film, and in such a way as to cover the element isolation insulating film; and

wherein the second electrode film, the first electrode film and the high dielectric-constant film are patterned to form a gate structure which includes a plurality of first parts crossing the active region in a first direction, and a second part which extends in a second direction intersecting the first direction and which connects the plurality of first parts to one another, and wherein, in the second part, the second electrode film is in contact with the element isolation insulating film, wherein the first direction is parallel to the one surface side of the semiconductor substrate and the second direction is parallel to the one surface side of the semiconductor substrate.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2018
From: LONGITUDE SEMICONDUCTOR S.A.R.L.
To: LONGITUDE LICENSING LIMITED
Reel/Frame 046863/0001 →
CHANGE OF NAME Recorded Aug 24, 2016
From: PS5 LUXCO S.A.R.L.
To: LONGITUDE SEMICONDUCTOR S.A.R.L.
Reel/Frame 039793/0880 →
Priority Claims (1)
JP 2012-257549 · Nov 26, 2012 · national
Continuity (1)
Related Publication 20150380504A1 · Dec 31, 2015