SEMICONDUCTOR DEVICE
A method includes receiving an impedance calibration command, adjusting an impedance by a first amount until the impedance reaches a first range, and adjusting the impedance by a second amount smaller than the first amount until the impedance reaches a second range.
1 . A method comprising:
receiving an impedance calibration command;
adjusting an impedance by a first amount until the impedance reaches a first range; and
adjusting the impedance by a second amount smaller than the first amount until the impedance reaches a second range.
2 . The method of claim 1 , wherein the second range includes a desired value.
3 . The method of claim 1 , wherein the impedance is an output impedance.
4 . The method of claim 1 , wherein the impedance is a termination impedance.
5 . The method of claim 1 , wherein the first amount corresponds to a first digital value and the second amount corresponds to a second digital value.
6 . The method of claim 1 , wherein the second range is in between the first range and a desired value.
7 . The method of claim 2 , further comprising stopping the adjustment of the impedance once the impedance reaches the second range, even if the impedance is not equal to the desired value.
8 . A method comprising:
receiving an impedance calibration command;
adjusting a voltage by a first amount until the voltage reaches a first range, the voltage corresponding to an impedance; and
adjusting the voltage by a second amount smaller than the first amount until the voltage reaches a second range.
9 . The method of claim 8 , wherein the second range includes a desired value.
10 . The method of claim 8 , wherein the impedance is an output impedance.
11 . The method of claim 8 wherein the impedance is a termination impedance.
12 . The method of claim 8 , wherein the first amount corresponds to a first digital value and the second amount corresponds to a second digital value.
13 . The method of claim 8 , wherein the second range is in between the first range and a desired value.
14 . The method of claim 9 , further comprising stopping the adjustment of the voltage once the voltage reaches the second range, even if the voltage is not equal to the desired value.
15 . A method comprising:
during an impedance calibration period, changing a voltage in a first stepwise manner with a first step size, the voltage appearing at a calibration terminal of a semiconductor memory device;
during the impedance calibration period, changing the voltage in a second stepwise manner with a second step size smaller than the first step size; and
maintaining a level of the voltage after the changing in the second stepwise manner.
16 . The method of claim 15 , wherein the period of change of the first stepwise manner is substantially equal to that of the second stepwise manner.
17 . The method of claim 15 , wherein the changing in the second stepwise manner follows the changing in the first stepwise manner.
18 . The method of claim 15 , wherein a direction of step of the first stepwise manner is the same as that of the second stepwise manner, and
wherein the level of the voltage maintained in the case where said direction is a first direction is different from the level of the voltage maintained in the case where said direction is a second direction opposite to the first direction.