IP Library Granted Patent US 9,496,191
Granted Patent B2
US 9,496,191 · App. 14/702,878 · Granted Nov 15, 2016

Semiconductor device

Inventor: Hiroyuki Momono (Kawasaki, JP)
Assignee: Renesas Electronics Corporation
H01L22/30H01L27/14603H01L27/14623H01L27/14643
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Quick Facts
Patent No.
US 9,496,191
App. No.
14/702,878
Granted
Nov 15, 2016
Kind
B2
Abstract

A mask includes a substrate, an effective pixel formation region and a reference pattern formation region. A pixel pattern for forming a pixel component that constitutes a pixel is arranged in the effective pixel formation region. A reference pattern for indicating a reference position where pixel pattern should be arranged in the effective pixel formation region is arranged in the reference pattern formation region. Pixel pattern is arranged to be displaced from the reference position toward a center side of the effective pixel formation region.

Claims (21)

1. A semiconductor device, comprising:

a semiconductor substrate having a main surface;

an effective pixel region arranged on said main surface of said semiconductor substrate; and

a reference portion arrangement region surrounding said effective pixel region on said main surface, wherein

a light blocking film that constitutes a pixel is arranged in said effective pixel region,

a reference portion for indicating a reference position where said light blocking film should be arranged in said effective pixel region is arranged in said reference portion arrangement region, and

said light blocking film is arranged to be displaced from said reference position toward a center side of said effective pixel region, wherein the light blocking film is formed in a first layer and the reference portion is formed in a second layer.

2. The semiconductor device according to claim 1 , wherein

in said reference portion arrangement region, a dummy structure is formed around said reference portion so as to be spaced apart from said reference portion.

3. The semiconductor device according to claim 1 , wherein

said reference portion is arranged to face said light blocking film with an outer perimeter line in said effective pixel region interposed therebetween, and

said reference portion is arranged to indicate said reference position in a direction along said outer perimeter line where said light blocking film facing said reference portion should be arranged.

4. The semiconductor device according to claim 3 , wherein

said reference portion has a planar shape that is symmetric with respect to an imaginary straight line as a symmetric line extending perpendicularly to said outer perimeter line on said main surface.

5. The semiconductor according to claim 1 , wherein the light blocking film constitutes a plurality of pixels.

6. The semiconductor according to claim 5 , wherein spacing between the pixels constituted by the light blocking film is smaller than spacing between patterns within the reference pattern.

7. A semiconductor device, comprising:

a semiconductor substrate including an effective pixel region surrounded by a reference portion region;

a light blocking film defining locations of pixels in the effective pixel region; and

a reference portion arranged in the reference portion region, the reference portion indicating a position where the light blocking film should be arranged, wherein the light blocking film is a first layer of the semiconductor, and the reference portion is a second layer of the semiconductor device.

8. The semiconductor according to claim 7 , wherein spacing between the pixels defined by the light blocking film is smaller than spacing between patterns within the reference pattern.

Assignments (2)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044533/0739 →
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
Priority Claims (1)
JP 2012-258646 · Nov 27, 2012 · national
Continuity (2)
Continuation 14079709 · Nov 14, 2013
Related Publication 20150235912A1 · Aug 20, 2015